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Summary:

Meta's Reality Labs is the world leader in the design of Virtual and Augmented Reality systems. Come work alongside best-in-class engineers and research scientists to create the technology that makes AR/VR/MR pervasive and universal. Join the adventure of a lifetime as we make science fiction real and change the world. The Display Architecture Team is seeking a Display Driver Engineer to drive the development of Meta’s proprietary display IP for mixed-reality displays. In this role, you will be working closely with Display Driver IC (DDIC) and pixel pipeline engineers, Visual Quality team, and DDIC vendors to design, evaluate performance, and embed Meta’s proprietary visual quality IP within the vendor's DDIC or in SoC for future AR/VR/MR products. This role offers involvement in a mix of forward-looking and product-critical projects, and requires close collaboration with multiple teams within the Meta Reality Labs.

Required Skills:

Display Driver Engineer Responsibilities:

1. Architect and develop proprietary display IP for mixed-reality displays. Own the reference software model for the algorithms.

2. Collaborate with DDIC architects to optimize algorithms for optimal gate-count and timing.

3. Collaborate with the optics and visual quality teams to evaluate performance.

4. Collaborate with Meta's panel team and panel vendors to enable algorithm validation in the production line.

Minimum Qualifications:

Minimum Qualifications:

5. Bachelor's degree in Electrical Engineering, Computer Engineering , related fields, or equivalent experience.

6. Hands-on experience with hardware implementation of algorithms.

7. Proficient in at least one programming language such as Matlab, Python or C++.

Preferred Qualifications:

Preferred Qualifications:

8. MS and 5+ years of experience or Ph.D. in Electrical Engineering.

9. Experience with display IPs such as Mura Compensation, Aging Compensation, HDR.

10. Understanding of the front-end digital design flow: RTL design, logic synthesis, timing verification.

11. Understanding of pixel pipeline for Displays and DDIC architecture.

12. Experience with FPGA prototyping.

Public Compensation:

$111,000/year to $164,000/year + bonus + equity + benefits

**Industry:** Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].