"Alerted.org

Summary:

Meta is hiring ASIC Engineering Manager within our Infrastructure organization to support EDA Infrastructure and CAD Methodology functions. We are looking for a technical manager with experience leading EDA Infrastructure (ASIC Development tools, Compute/Storage/Licensing management,etc.) and/or CAD Methodology (Physical Design, Timing Methodology, Physical Verification, etc) for large complex disaggregated ASICs.

Required Skills:

ASIC Engineering Manager, EDA Infrastructure Responsibilities:

1. Manage the EDA Infrastructure team, working closely with Architecture, Design, DV, Implementation, Emulation, and ASIC PE/DevX teams to develop/improve internal tools for ASIC development, develop/support/deploy EDA tools/flows/methodologies, and drive ASIC developer productivity initiatives.

2. Partner with cross-functional teams such as ASIC PE, ASIC DevX, and Enterprise Engineering teams on adapting FB infrastructure to ASIC design solutions, including but not limited to Source Control Management, Continuous Integration, data management and reporting.

3. Collaborate with Internal Infrastructure teams to manage/forecast EDA license requests, installation/maintenance, and support compute grid, storage management and job scheduling.

4. Identify candidates, hire, schedule, support, mentor, and train a team of ASIC engineers in order to scale our infra silicon development to satisfy Meta application requirements.

5. Contribute to, analyze, review SOWs from vendors, supporting documentation, requirements sets that meet the needs of internal customers.

6. Partner with technical program management and supply chain team members to manage external development partners, suppliers and vendors.

Minimum Qualifications:

Minimum Qualifications:

7. B.S. or M.S. degree in Computer Engineering or Electrical Engineering or related technical fields

8. 12+ years of experience working in an ASIC development environments and/or CAD/Methodology development

9. 3+ years of experience as a People Manager.

10. Knowledge of RTL2GDS ASIC tools and flows.

11. Experience with ASIC EDA infrastructure (compute, storage, job scheduling) management, maintenance and support.

12. Experience with developing and supporting solutions for ASIC design environment and infrastructure.

13. Experience with EDA vendor and/or Foundry interactions

Preferred Qualifications:

Preferred Qualifications:

14. Experience managing environments for concurrent development of IP and SOC releases and working with cross functional teams to support the same

15. Experience driving ASIC development productivity initiatives like TAT improvement, AI/ML assisted workflows, etc.

16. Experience with library characterization, process technology evaluation, and/or test chip development for better understanding of process technology across multiple nodes/foundries

Public Compensation:

$212,000/year to $291,000/year + bonus + equity + benefits

**Industry:** Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].