"Alerted.org

Introduction

Do you have a passion for Design Verification? Are you good at breaking things and giving feedback to engineers in a succinct, reproducible way? Do you enjoy finding holes in designs using multiple verification methods? Do you have strong debugging skills? Are you flexible and ready for a dynamic fast-paced development environment? If so, let’s talk.

Above all, we are looking for applicants who will thrive in an open, vibrant, flexible, collaborative environment and desire creative freedom and an opportunity to work on a high performing team.

We need fast, focused verification engineers to adjust with the changing environment while following best practices for high quality and sustainable code.

Your role and responsibilities

This role is responsible for enhancing and growing our Design Verification team. This includes defining and building benches for our designs from scratch, automating reporting as well as working with designers to find bugs to speed up the development cycle. Other responsibilities:

• Define the success criteria for verification of IP blocks

• Creatively solve verification requirements with the right tool i.e. UVM, System Verilog, Formal Verification or lab testing with firmware.

• Creating the test benches and test cases to meet all verification requirements.

• Articulate and compare alternative approaches.

• Strong problem-solving skills and ability to direct the design team toward the problematic area of the design.

• Challenge the validity of given procedures and processes to enhance, improve and develop complementary adjustments and solutions.

• Utilize verification and engineering principles to create Random/Directed tests.

Required technical and professional expertise

Experience with System Verilog and lab environment.

Demonstrated communication skills in a high performing development environment.

Self-Starter, ready to move quickly to keep the design moving forward

Preferred technical and professional experience

• Natural inclination for Verification and Testing with a desire to break the designs.

• Experience with 3rd party IP blocks: DDR, PCI, NAND, or AXI.

• Experience with Cadence VManager.

• Delivering projects with RTL/HW engineers.

• Experience with System Verilog assertions.

• Agile development.

• Python experience.

IBM is committed to creating a diverse environment and is proud to be an equal-opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.