Featured Job
-
Job Removed or Not Found
Related Jobs
- Rocket Lab USA (Silver Spring, MD)
- …AS A SENIOR STRUCTURAL ANALYSIS ENGINEER I: Bachelor's degree in mechanical or aerospace engineering; or other engineering discipline 5+ years of finite element analysis
- Invenergy LLC (Chicago, IL)
- …Position Overview The Senior Engineer, Interconnections and Grid Analysis will perform technical analysis to assist in the interconnection process for the different
- Clark Nexsen (Virginia Beach, VA)
- …include but are not limited to the following: Performing Transportation engineering duties as a Senior Transportation Engineer including analysis and design involving
- Clark Nexsen (Virginia Beach, VA)
- …include but are not limited to the following: Performing civil engineering duties as a Senior Civil Engineer including analysis and design involving utilities, roadways,
- Repligen (Rancho Dominguez, CA)
- …Act as a Subject Matter Expert for TFF and other bioprocessing manufacturing systems. Lead projects in equipment design, tech transfer, process validation, and facility
- Tris Pharma (Monmouth Junction, NJ)
- …compliance with all SOPs, cGMP, FDA, as well as all applicable company compliance guidelines, standards and objectiveOversees and manages maintenance and tracking of
- Novo Nordisk Inc. (West Lebanon, IN)
- …include validation protocol execution (IQ, OQ, PQ & PV), data analysis and final report preparation for utilities, equipment and instrumentation Maintain effective
- Merck & Co. (Rahway, NJ)
- …Job Description: The Formulation, Laboratory, and Experimentation (FLEx) Center is a new multi-modality (small molecule, biologics, vaccine) Drug Product development and
- Rocket Lab USA (Long Beach, CA)
- …FOR A SENIOR RF DESIGN ENGINEER I: Bachelors degree in electrical engineering, RF communications (or other engineering degree) and 5+ years of relevant experience
- Draper (Cambridge, MA)
- …Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and
