Featured Job
-
Job Removed or Not Found
Related Jobs
- Celestial AI (Santa Clara, CA)
- …Develop and implement synthesis flows for high-performance, low-power digital designs using industry-standard EDA tools (Genus, Tempus, DC, PrimeTime, Conformal LEC,
- Amazon (Cupertino, CA)
- …*Perform physical design for Amazon's machine learning custom silicon solutions *Participate in various aspects of physical design: full chip floorplanning, circuit
- DBSI Services, Inc. (Milpitas, CA)
- …Pre-layout STA to ascertain feasibility, timing constraint validation and feedback tocustomers and design teams Chip/Block Level Floorplanning and pin assignment Review
- Neuralink (Fremont, CA)
- …The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth
- TrellisWare Technologies, Inc (San Diego, CA)
- …include: Designs module and system level architectures. Programs modules and systems in VHDL. Simulates both modules and systems. Generates required design documentation.
- Microchip Technology (San Jose, CA)
- …Microchip Technology FPGA Business group is seeking a highly skilled and experienced Memory Interconnect System Architect to join our dynamic team. The successful
- Tenstorrent (Austin, TX)
- …Implementation of DFT features into RTL using verilog. Understanding of DFT Architectures and micro-architectures. ATPG and test coverage analysis using industry standard
- Advanced Micro Devices, Inc (San Jose, CA)
- …*Maintain and enhance a fully automated RTL implementation flow environment facilitating pre-netlist synthesis, static timing analysis, and several other design flows
- SpaceX (Redmond, WA)
- …Simulate and model communication systems Work with system architects, RF engineers, antenna engineers, modem/DSP, and ASIC engineers to partition functions between
