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Physical Design, Sr Principal Application Engineer
- Cadence Design Systems, Inc. (San Jose, CA)
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Sr Principal Application Engineering (AE) - a blend of pre-sales, post-sales and design convergence in the netlist-GDS product space focusing on digital implementation and signoff.
As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading-edge customers. With your expertise, you'll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn design concepts into reality. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies
Primary focus will be for RTL-to-GDS digital implementation platform and signoff products (Genus, Joules, Innovus, Tempus, Quantus, Liberate) as well as industry shaping AI products (Cerebrus AI Studio, Cerebrus, CoPilot).
Job Requirements
Minimum
+ 10+ years of industry Physical Design experience
+ BS degree Computer Science/Engineering, Electrical, Engineering, or related field
+ Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required
+ Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
+ Experience with advanced nodes 10nm and below
+ Experience in scripting languages such as Tcl/Perl/Python is a must
+ Strong customer-facing communication and problem-solving skills
+ Strong personal drive for continuous learning and expanding professional skill sets
+ Strong verbal, written, and customer communication skills
Preferred
+ Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
+ Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired
+ Experience with advanced nodes 5nm and below
The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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Physical Design, Sr Principal Application Engineer
- Cadence Design Systems, Inc. (San Jose, CA)