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Summary:

Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power machine learning accelerators and state-of-the-art SoCs.

Required Skills:

Digital Design Engineer Responsibilities:

1. Contribute to ASIC digital µArchitecture and design for low-power machine learning hardware accelerator

2. Assist performance/power analysis of the design and help meet the power and performance targets

3. Work with architects to map Machine learning algorithms on the hardware

4. Support hand-off and integration of blocks into larger SOC environments

5. Work across disciplines, brainstorm big ideas, build new methodologies

Minimum Qualifications:

Minimum Qualifications:

6. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

7. 6+ years of experience as a Hardware Design Engineer for production silicon shipped in volume

8. Experience in digital design µArchitecture, RTL coding

9. Experience in Machine Learning IPs Silicon development

10. Experience with at least 1 procedural programming language (C, C++, Python etc.)

Preferred Qualifications:

Preferred Qualifications:

11. Experience in SoC integration and ASIC architecture

12. Knowledge of Physical Design and Low power implementation

13. Experience with Machine learning models, algorithms or accelerator architecture

Public Compensation:

$142,000/year to $203,000/year + bonus + equity + benefits

**Industry:** Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].