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Summary:

Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test (DFT) methodologies, implementation, and verification to build best-in-class System on a Chip (SOC) and IP for data center applications. We are looking for individuals with a background in Design for Testability (DFT) methodologies and implementation for IP/SOC, with demonstrated use and understanding of Siemens/Synopsys DFT EDA tools and IEEE standards (1149, 1500, 1687).

Required Skills:

ASIC Engineer, DFT Responsibilities:

1. Develop and implement DFT strategies for data center scale large/disaggregated SOCs, considering factors such as fault coverage, test time, and in-system test

2. Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion, and test pattern generation

3. Ensure compliance with IEEE standards (1149, 1687) for DFT methodologies and test patterns

4. Conduct fault simulation and coverage analysis to assess the effectiveness of DFT strategies and identify areas for improvement

5. Generate high-quality test patterns using automated test pattern generation (ATPG) tools

6. Verify the correctness of DFT implementation through simulation and hardware testing

7. Collaborate with design/implementation teams to ensure that DFT requirements are met throughout the process

Minimum Qualifications:

Minimum Qualifications:

8. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

9. 8+ years of experience in DFT for large and/or mixed-signal ICs

10. Understanding of DFT concepts, including scan insertion, BIST, and boundary scan

11. In-depth knowledge of DFT EDA tools (Siemens/Synopsys)

12. Familiarity with IEEE standards 1149, 1500, and 1687

13. Experience with fault simulation and coverage analysis tools

14. Knowledge of scripting languages (e.g., Perl, Python) for automation

Preferred Qualifications:

Preferred Qualifications:

15. Master's degree in Electrical Engineering or Computer Engineering

16. Experience with mixed-signal DFT methodologies, at IP subsystem, SOC, or disaggregated SOCs (2.5D or 3D)

17. Experience with hardware testing and debugging

Public Compensation:

$173,000/year to $249,000/year + bonus + equity + benefits

**Industry:** Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].