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  • Senior Engineer, Front End Computer Aided Design

    Microsoft Corporation (Raleigh, NC)



    Apply Now

    The Microsoft Silicon Engineering and Solutions Team within SCHIE is seeking passionate, driven and intellectually curious engineers to join our Central Front-End Tools, Flows and Methodology (TFM) group. This team drives state-of-the-art converged solutions, automation, and quality assurance checks across front-end areas like RTL & VIP Design, Design Verification, Validation, DFT, Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff and SoC integration. This team supports numerous simultaneous projects within Microsoft by developing workflows and software for our design engineers so that they can deliver cutting-edge silicon solutions for Microsoft.

     

    As a Senior Front-End CAD Engineer, you’ll drive the development and adoption of cutting-edge SoC and IP design methodologies, partnering with design teams across Microsoft Silicon to deliver scalable, high-performance CAD solutions.

     

    \#azurehwjobs #SCHIE

    Responsibilities

    + Be part of a central FE CAD team that drives common FE methodologies for SoC and IP design.

    + Be the specialist in your domain and act in partnership with the execution team.

    + Provide leadership to the design community for the CAD domain for which you are responsible.

    + Work with stakeholders across the Microsoft Silicon group to collect TFM requirements.

    + Develop, enhance, and integrate common design and verification IP for organization-wide use.

    + Work with EDA vendors to adopt the most optimal solutions for silicon verification and design.

    + Embody our culture (https://careers.microsoft.com/v2/global/en/culture) and values. (https://www.microsoft.com/en-us/about/corporate-values)

    Qualifications

    Required Qualifications:

    + Bachelor's Degree in Computer Science or related technical field AND 4+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python

    + OR equivalent experience.

    + Experience with hand-off to backend and Logic Design compilation, elaboration in addition to experience in Low Power design.

    + 5+ years of experience in digital design or CAD flows/tools development in this area.

    + Well-rounded and familiar with most Front-End Tools, Flows and Methodologies.

    + Experienced writing scripts/software with industry standard languages like Python, TCL, Perl, C/C++ or Java (Python preferred)

    Other Requirements:

    Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to, the following specialized security screenings:

     

    + Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

    Preferred qualifications:

    + Master's Degree in Computer Science or related technical field AND 6+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR Bachelor's Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.

    + 10+ years of relevant experience.

    + Expertise in CPU/SoC design principles.

    + For Front-End Handoff CAD Roles:

    + In-depth knowledge of Front-End workflows, methodologies, and best practices.

    + Ability to design and verify reusable design components.

    + Expertise in Synthesis and Timing Constraints. Exposure to tools Timevision, Fishtail, Formality/LEC, Genus, Fusion Compile.

    + Expertise in RTL power/UPF linting flows like Power Artist/Jules, VCLP.

    + Expertise in RTL filelist generation, SoC connectivity, integration.

    + Hands on experience with RTL2PD handoff process.

    + Expertise in one of the following areas:

    + Design compile, elaboration and filelist/libraries handling.

    + Design release packaging and qualification, RTL quality flows, static checks.

     

    Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $158,400 - $258,000 per year.

     

    Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

     

    Microsoft will accept applications for the role until November 14, 2025.

     

    \#azurehwjobs #SCHIE \#HIFE **\#MSCareerEvents25**

     

    Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .

     


    Apply Now



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    Microsoft Corporation (Raleigh, NC)
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