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Principal Engineer Microelectronic Semiconductors
- Northrop Grumman (Apopka, FL)
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RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE TYPE: Interim Secret
TRAVEL: Yes, 10% of the Time
Description
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
_Northrop Grumman Mission Systems is looking for you to join our team as a_ **_Principal Microelectronics Semiconductor Metals Process Engineer_** _for our Advanced Packaging Technology facility in_ **_Apopka, FL_** _._
_The_ **_Principal Microelectronic Semiconductor Metals Process Engineer_** _will provide senior fabrication support and technical direction for a wide range of metals processes and tools for semiconductor wafers. The selected candidate will own the responsibility for process technology development and production deployment for multiple metal interconnect processes, including PVD and solder bumps fabricated across multiple equipment systems._
_They will collaborate closely with other process owners for back-end post-processing to ensure satisfactory integration of under bump metallization and sphere drop processes into overall product flows for both production parts, as well as new process and product development activities._
_The chosen candidate must have excellent verbal and written communication skills; be able to multitask in a fast-paced, dynamic, and high-visibility environment; and work well as part of a team._
_The position will demand large amounts of time working in a cleanroom environment. Some lifting and standing will be required._
_What You’ll get to Do_** **_:_
**_Team_** _:_
+ _Primary metals team leader responsible for all PVD and plasma clean processes, development, and associated metrology. The role will require experience with production deployment across a broad range of tool sets, processes, and wafer sizes._
+ _Work closely with cross-functional teams in Process Engineering, Manufacturing, Quality, Integration, and R&D to ensure process stability, improve yield, high-volume ramp, and drive continuous improvement initiatives._
+ _Mentor and train junior engineers and technicians on shift to support quality and delivery metrics for operations._
+ _Drive process improvements for new technology insertion to improve process robustness and achieve technology milestones for yield, reliability, and cost._
+ _Excellent oral and written communication skills with a strong attention to detail._
+ _The ability to lead and work efficiently in a group or as an individual contributor._
+ _Demonstrated ability to lead complex multi-tool process development projects_
+ _Fluency in MS Office software applications_
**_Process/ Equipment Management_** _:_
+ _Oversee and develop robust, manufacturable process recipes for Foundry customers in PVD, plasma cleaning, and bumping processes, and the associated metrology and analysis using designs of experiments (DOEs) and industry standard methods._
+ _Identify, resolve issues, and improve these plating processes to provide maximum quality and process availability._
+ _Ensure all metal equipment is properly qualified and calibrated._
_Process Development:_
+ _Define and optimize PVD thin films, plasma cleans, dry etching(metal etch), sphere drop, and redistribution layers for bumping processes in support of new technologies._
+ _Develop new technologies across the portfolio of emerging technologies in semiconductor wafer-level interconnect manufacturing on multiple wafer sizes._
**_Quality Control_** _:_
+ _Execute strategic projects for improvement of sustaining operations through monitoring statistical process control (SPC) charts and disposition of out-of-spec material._
+ _Support process control, planning, safety, and quality organizations to ensure the equipment meets cost, quality, safety, and reliability metrics._
+ _Use Failure Mode and Effects Analysis (FMEA) to assess and mitigate risk for critical processes, process modules, and tools._
**_Problem-Solving_** _:_
+ _Drive process improvements for volume manufacturing using statistical tools, DOE techniques, data-driven decision making, and systematic problem-solving skills._
+ _Use Failure Mode and Effects Analysis (FMEA) to assess and mitigate risk for critical processes, process modules, and tools._
**_Safety Compliance_** _:_
+ _Adhere to all safety regulations and protocols to maintain a safe working environment._
**_Vendor Management_** _:_
+ _Collaborate and drive continuous improvement projects with both equipment vendors and materials suppliers._
+ _Support capital equipment projects through procurement, installation, and release for production use_
**_Production Support_** _:_
+ _Achieve customer on-time delivery and cycle time commitments through tool qualification and OEE management with manufacturing operations._
+ _Coordinates with production on day-to-day activities. Assists in the resolution of production workflow issues._
+ _Use Failure Mode and Effects Analysis (FMEA) to assess and mitigate risk for critical processes, process modules, and tools._
**_Documentation & Data Systems_** _:_
+ _Maintain accurate records of processes/recipes, quality checks, and maintenance activities._
+ _Support engineering data analysis, including metrology data, ERP and MES data, and other in-process metrics_
_Basic Qualifications for Principal Microelectronics/Semiconductor Metals Process Engineer_** **_:_
+ _BS Degree in Materials Science, or a related STEM field with a minimum of (5) years of Semiconductor Metals (PVD) and/or Alloys experience, or (3) years with a master’s, or (0) years with a PhD_
+ _Proficiency in semiconductor PVD process control and process development_
+ _Proficiency in process set-up, optimization, and troubleshooting for PVD, plasma clean, and bumping toolsets_
+ _Strong understanding of vacuum technology, thin-film stress, adhesion, uniformity, and contamination control_
+ _Experience with under bump metallurgy, and_ _optimizing plasma parameters (RF power, gas chemistry, pressure, bias, time) to achieve residue-free surfaces._
+ _Experience fabricating a wide variety of interconnect technologies and metals, including lead and lead-free solders and other metal systems._
+ _Experience in a production manufacturing environment_
+ _Experience in Design of Experiment (DOE), Statistical Process Control (SPC), and 6 sigma concepts for process development and control_
+ _Experience in conducting FMEA analyses of processes and equipment_
+ _Experience in technical data collection, organization, and analysis skills_
+ _Proficient in data analysis techniques/programs_
+ _Familiarity with Enterprise Resource Planning and Manufacturing Execution Systems_
+ _US Citizenship is required_
+ _The ability to obtain a DOD Secret Clearance is required_
_Preferred Qualifications for Principal Microelectronics/Semiconductor Metals Process Engineer_** **_:_
+ _Experience with JMP, MATLAB, VBA, and/or similar_
+ _Expert in 8D Problem Solving_
+ _Experience with CAD software (AutoCAD, NX, or similar)_
+ _Experience with Minitab software_
+ _Experience with SAP MRP software_
+ _Strong integration skillset across lithography, plasma descum, wet cleans, electroplating, etch, AOI, and reflow_
+ _Characterize surface cleanliness using SEM, FTIR, ellipsometry, contact angle, and XPS_
+ _Experience in flip-chip, 2.5D, and 3D packaging_
+ _Active Secret Clearance or Higher_
+ _Six Sigma Blackbelt Certification_
**_What We Can Offer You_** _:_
_Northrop Grumman provides a comprehensive benefits package and a work environment that encourages your_
_growth and supports the mutual success of our people and our company. Northrop Grumman benefits give you the_
_flexibility and control to choose the benefits that make the most sense for you and your family._
_Your benefits will include the following: Health Plan, Savings Plan, Paid Time Off, and Additional Benefits, including_
_Education Assistance, Training and Development, 9/80 Work Schedule (where available), and much more!_
Primary Level Salary Range: $98,400.00 - $147,600.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.
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Principal Engineer Microelectronic Semiconductors
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