• SR. Director of Physical Design

    Insight Global (Santa Clara, CA)


    Job Description

    Insight Global is seeking SR. Director of Physical Design to sit onsite at a semiconductor client in Santa Clara, CA. This person will lead and mentor a physical design team, driving strategy and execution across multiple projects. They will own the full ASIC physical design flow from RTL handoff to GDSII, including synthesis, PnR, timing closure, and sign-off. They will also optimize design flows for efficiency and PPA targets while collaborating with cross-functional teams on DFT, packaging, and manufacturing, ensure successful tapeout and present progress to executive leadership.

     

    (This role can pay up to $250,000 - $280,000 a year depending on years of experience).

     

    We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to [email protected] learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/.

    Skills and Requirements

    • Expertise in multiple areas of physical design, timing, and signoff

    • Strong scripting and automation skills

    • Master’s degree or equivalent in Electrical Engineering with 15+ years’ of experience

    • At least 8+ years of experience in leading / managing a team with a proven track record first pass successful silicon implementation

    • Deep expertise in the following areas:

    o RTL-to-GDSII flows

    o Synthesis, PnR, STA, EM/IR, and PV

    o Physical design for advanced process node (5nm and below) across two or more foundries

    • Strong knowledge of EDA tools (Synopsys or Cadence) and scripting (Python, Perl).

    • Exceptional leadership, project management, and problem-solving skills.