- Qualcomm (San Diego, CA)
- …and provide support and training + Collaborate with SoC design, product and test engineer teams to drive standardization of DFT /ATPG methodology and flow across ... and advance the industry state of the art for DFT . Support the company-wide deployment of flows architected to...the company. + Work closely with multiple EDA tool vendors to resolve day-2-day issues, help to… more
- Qualcomm (San Diego, CA)
- … EDA ATPG and insertion tools. + Experience in DFT implementation, Scan/ATPG, MBIST insertion/validation, coverage analysis. **Minimum Qualifications:** * ... who will be responsible for the implementation and verification of advanced DFT /DFD (Design for Test/Design for Debug) techniques for low power, multi voltage… more
- Renesas (San Jose, CA)
- Senior Staff Analog Engineer Job Description + Specify and design of CMOS circuits meeting performance, area, power, and timescale constraints + Run analog/mixed ... quality documentation for designed circuits. + Work closely with DFT engineers to ensure alignment to DFT ...circuits and review AMS simulations. + Strong competence with EDA design tools and the Cadence design environment. +… more
- Google (Sunnyvale, CA)
- …and timing ECO creation, timing margins). + Experience with Electronic Design Automation ( EDA ) tools (ie, Primetime, Tempus, Timevision, STAR-RC) and EDA Tcl ... In this role, you will work on the physical implementation of Application -specific integrated circuits (ASIC) using advanced technology nodes. You will work on… more
- SpaceX (Sunnyvale, CA)
- SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- Amazon (Cupertino, CA)
- …AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our ... performance at low cost. You'll provide leadership in the application of new technologies to large scale deployments in...- Interface directly with RTL, Physical Design, Package Design, DFT and other teams to improve methodologies and efficiencies… more
- Amazon (Cupertino, CA)
- …hours/week) for 12 consecutive weeks during summer. By applying to this position, your application will be considered for all locations we hire for in the United ... physical design flows and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic...with Place and Route, digital implementation - Experience with EDA tools from Synopsys (ICC2, DC, PT), Cadence (Genus,… more
- Qualcomm (San Diego, CA)
- …power, and packaging teams to ensure holistic design convergence + Partnering with EDA tool vendors and internal CAD teams to develop and enhance automation flows ... and its sub-blocks + Hands on experience with Synthesis, DFT , Place and Route, Timing and Reliability Signoff +...with a disability and need an accommodation during the application /hiring process, rest assured that Qualcomm is committed to… more