• Senior Timing CAD Engineer, Applied AI

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human inventiveness and intelligence. NVIDIA's ASIC -PD Methodology organization is driving the next generation of AI-assisted timing ... ideally for EDA, semiconductor, or complex data domains + .Strong background in VLSI/ ASIC design - with deep understanding of timing, constraints, STA, or sign-off… more
    NVIDIA (11/15/25)
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  • Hardware Engineer II (Co-op) - United States

    Cisco (San Jose, CA)
    …to high volume manufacturing. Creative Hardware Engineering positions are available in: + ASIC Design and Verification + System/Board Design + Circuit Board Layout + ... signal integrity, power electronics, or embedded system design. + Knowledge of FPGA/ ASIC design flow and basic understanding of VHDL/Verilog is a plus. **Why… more
    Cisco (11/14/25)
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  • Professional Structural Engineer PE / SE

    Nucor Steel Auburn, Inc. (Lathrop, CA)
    …from an ABET Accredited school. + Strong knowledge of structural buildings codes: IBC, ASIC 360, ASIC 341, ASIC358, ASCE7, AISI, etc. + Professional Engineer ... registration in the United States or 3-5 Years of structural design experience. + Proficient in verbal and written communication in English + Must be legally authorized to work in the United States without company sponsorship now or in the future. Preferred… more
    Nucor Steel Auburn, Inc. (11/13/25)
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  • SW Engineering Technical Leader, Data Center

    Cisco (San Jose, CA)
    …specs independently. * Develop SDK for next generation feature rich network ASIC . * Collaborate with cross functional teams which include Hardware/ ASIC ... /Marketing/Testing groups to take developed products to market. * Interact and Innovate with close collaboration with senior leaders, Distinguished and Principal engineers with focus on Scale, Performance and Reliability. **Minimum Qualifications** + Bachelors… more
    Cisco (11/13/25)
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  • Product Quality Engineer (Hybrid)

    Cisco (San Jose, CA)
    …most ground breaking technology rollout in the networking industry associated with ASIC facilitating ASIC infrastructure, low power system design, innovative ... cooling and coordinated telemetry features. You'd also be establishing new processes in place that address a changing dynamic and quality expectation with web-scale customers. Your Impact Product Quality Engineer will own and drive New Product Introduction… more
    Cisco (11/13/25)
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  • Hardware Modeling Engineer

    Cisco (San Jose, CA)
    …the team** Leaba Semiconductor, now part of Cisco, is the heart of Cisco's ASIC design group. You'll be part of our team driving Cisco Silicon One's next-generation ... simulation accuracy, performance, and multi-functional collaboration. + Work closely with ASIC design and verification teams from initial definition to signoff of… more
    Cisco (11/12/25)
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  • Senior Principal DFT Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge ... Requirements; US citizenship preferred. + Prior 5-15 years of professional experience in SoC/ ASIC Digital Design with focus on Design for Test (DFT) + Should possess… more
    Cadence Design Systems, Inc. (10/30/25)
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  • Lead Principal Electrical Design Engineer

    Micron Technology, Inc. (San Jose, CA)
    …to practical design challenges. **What Sets You Apart:** + Experience with FPGA/ ASIC design using HDL languages (Verilog, VHDL, SystemVerilog). + Familiarity with ... FPGA/ ASIC development tools such as Vivado or Quartus. + Knowledge of communication protocols (SPI, I2C, UART, JTAG, PCIe) and scripting languages like Python for… more
    Micron Technology, Inc. (10/27/25)
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  • Sr. Physical Design Methodology Engineer,…

    Amazon (Cupertino, CA)
    …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and ... in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design, and methodologies including synthesis, place and route, STA,… more
    Amazon (10/25/25)
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  • Non Destructive Test Technician - Tech 2/3…

    Northrop Grumman (Palmdale, CA)
    …+ Requires certifications in non-destructive testing in accordance with regulations. B ** asic Qualifications Level 2:** + High School Diploma/GED and 2 years of ... of time, as determined by the company to meet its business needs. B ** asic Qualifications Level 3:** + High School Diploma/GED and 4 years of Non-Destructive Test… more
    Northrop Grumman (10/14/25)
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