- Amazon (Sunnyvale, CA)
- …the RTL/Arch. Teams Basic Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such as 5nm/7nm, 14/16nm - ... Expertise using CAD tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) to block design for synthesis, formal verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop… more
- Amazon (Cupertino, CA)
- …and sign-of. tools in TCL, Perl, and/or Python - Solid understanding of ASIC physical design, physical design flows, and methodologies including synthesis, place and ... route, STA, formal verification. - Proven track record of delivering metric driven PPA flow development and support. Preferred Qualifications - Demonstrated level of expertise in PD tools such as Innovus, ICC2, FusionCompiler, STA, and Sign-Off. - Experience… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- …synchrotron or XFEL user facilities. + Proficiency in x-ray sensor and ASIC characterization, particularly for hybrid pixel detectors. + Expertise in detector ... operation and calibration, especially for charge-integrating hybrid pixel detectors. + Ability to write test and analysis scripts (eg, Python) and familiarity with Linux. + Strong communication skills to effectively explain complex technical concepts. + Proven… more
- NVIDIA (Santa Clara, CA)
- …debug and lab tools (oscilloscopes, multimeters, logic analyzers). + Experience with ASIC power saving features and methods + Deep understanding of firmware/driver ... structures and their interaction with HW. + Excellent problem solving, teamwork, and interpersonal skills. + Background with automation scripting in languages such as Perl, Python, tcl. NVIDIA is leading the way in groundbreaking developments in Artificial… more