- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success to our people,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the world's leading ... GPU's, for deep learning, gaming, HPC and supercomputing. We offer the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial… more
- Amazon (Sunnyvale, CA)
- …Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... IP's. The Role: Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a state-of-the-art wireless… more
- Cisco (San Jose, CA)
- Sr Foundry Planner - ASIC , Silicon One Apply (https://jobs.cisco.com/jobs/Login?projectId=1444617) + Location:San Jose, California, US + Area of InterestSupply Chain ... + Compensation Range143600 USD - 182500 USD + Job TypeProfessional + Technology Interest*None + Job Id1444617 **The application window is expected to close on: 9/11/2025** **Job posting may be removed earlier if the position is filled or if a sufficient number… more
- Tarana Wireless (Milpitas, CA)
- …will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... problems. This position will verify the world's most powerful SoCs for broadband wireless access that will connect the world wirelessly with fiber-class speed, on both Line of Sight and Non Line of Sight connections. What you'll be doing: + Work with some of… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and ... timing closure of high-speed designs. + Strong background and experience in timing constraints generation, clocking, process variations and signal integrity + Proficiency in programming and scripting languages, such as, Perl, Tcl, Python, etc. and ability to… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... challenge yourself and be a part of something great, join us today! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized… more
- NVIDIA (Santa Clara, CA)
- …and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem ... solver and highly motivated individual searching for a collaborative and exciting role, join us today. We encourage applicants with a history of proven success working in a multicultural and diverse environment. NVIDIA has continuously reinvented itself over… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers ... you an outstanding opportunity to influence performance of the next generation GPU and SoC, allowing you to have real impact in a multifaceted, technology-focused company with product lines ranging from consumer graphics to self-driving cars and the growing… more
- Google (Mountain View, CA)
- …+ Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience. + 8 years of experience in DFT or physical design. + Experience ... with scan insertion, Automatic Test Pattern Generation (ATPG), gate level simulations and silicon debug, low power designs, Built-In Self-Test (BIST), Joint Test Action Group (JTAG), Internal JTAG (IJTAG) tools and flow. + Experience with DFT Electronic Design… more