• Senior Analog/mixed-signal IC Design

    Cisco (San Jose, CA)
    …(>25Gb/s), and high accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with ... Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San...other Acacia groups including digital/DSP design , system design , package design ,… more
    Cisco (08/23/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... group of researchers and engineers, and use your digital design and verifications skills to implement the testing infrastructure...be completed prior to joining Meta 8. 2+ years ASIC development cycle industry experience 9. 2+ years of… more
    Meta (08/01/25)
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  • Design Verification Engineer - Machine…

    Meta (Sunnyvale, CA)
    …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with a group ... of researchers and engineers, and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations… more
    Meta (08/01/25)
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  • Sr. SDE C/C++ Hardware/Software Co- Design

    Amazon (Cupertino, CA)
    Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire ... industry. We design and build every component of our hardware and...that drives neural network model execution across our custom ASIC -based ML Accelerator chips. Working at the intersection of… more
    Amazon (07/24/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...group of researchers and engineers, and use your digital design skills to implement and contribute to development and… more
    Meta (08/01/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (07/04/25)
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  • Network Production Engineer, Design

    Meta (Sacramento, CA)
    …Data Center Network Engineers at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network. This team owns the ... lifecycle of the Data Center network, which includes areas of planning, design , product definition, QA, deployment, and monitoring. Simple, elegant, and scalable… more
    Meta (08/23/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
    Silvus Technologies (08/18/25)
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  • SOC Design - STA, Hardware Compute Group

    Amazon (Sunnyvale, CA)
    …is powering the latest generation of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of our customers. We are a part ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. *… more
    Amazon (08/01/25)
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  • Senior FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …of the brightest minds in the industry. If you're passionate about digital design , solving complex problems, and building products that make a global difference, ... you've been waiting for. As part of our FPGA Design Team, you'll contribute to the development and testing...advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You'll play a vital role in… more
    Tarana Wireless (08/22/25)
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