- Amazon (Cupertino, CA)
- Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire ... industry. We design and build every component of our hardware and...that drives neural network model execution across our custom ASIC -based ML Accelerator chips. Working at the intersection of… more
- Broadcom (San Jose, CA)
- …Engineering or Computer Engineering with 6+ years of high-speed analog mixed signal design in advanced CMOS nodes.** + **Experience in designing low jitter, low ... SimuLink, VerilogA, Verilog.** + **Good understanding of high-speed analog mixed-signal design trade-offs to drive attainment on metrics such as power, jitter… more
- Broadcom (San Jose, CA)
- …Electrical Engineering or Computer Engineering with 6+ years of high-speed analog mixed signal design in advanced CMOS nodes, or a PhD + Experience in designing low ... Matlab, SimuLink, VerilogA, Verilog. + Good understanding of high-speed analog mixed-signal design trade-offs to drive attainment on metrics such as power, jitter… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical design ... MS or Ph.D. in Electrical Engineering with a minimum of eight years of CPU/GPU/ ASIC implementation + Proficiency in TCL scripting + Proficiency in chip front-end and… more
- Google (San Diego, CA)
- …field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + 4 years of experience in ... leading IP/SoC design teams. + Experience with ARM-based SoCs, interconnects, and ASIC methodology. **Preferred qualifications:** + Master's degree or PhD in… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- Meta (Menlo Park, CA)
- …Meta is seeking a hands-on engineering managers to join the AI & Systems Co- Design team at Meta. The team works at the intersection of hardware, software and ... other cutting edge open-source as well as internal infrastructure projects. The co- design AI team has established relationships with both academia and industry. We… more
- Broadcom (Irvine, CA)
- …guarantee production quality for "first spin" silicon, we in the CSG ASIC team combine production workload-focused test harnesses with large scale emulation ... resources to provide extensive system level ASIC test coverage prior to first silicon fab. Our...analysis / troubleshooting + Ability to work with hardware design engineers to capture and analyze digital wave forms… more
- Meta (Menlo Park, CA)
- …and remote teams and suppliers, to define product roadmap and program 2. Specify, design , and develop CPU/GPU/ ASIC based compute hardware solutions, and ASIC ... systems 4. Support hyper-scale deployment and obtain learning for next generation design 5. Collaborate with open source hardware community to drive innovation for… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Job Description:** Broadcom ASIC Product Development team is looking for a NPI Product Development ... Engineer who is interested in working on leading-edge ASIC products, debugging and solving technical issues and delivering the best products to the customer.… more