- Google (Mountain View, CA)
- …the quantum electronics team, providing key technical contributions in the area of ASIC Design Verification (DV) as we realize sophisticated electronics for ... or equivalent practical experience. + 5 years of experience with design verification. + Experience verifying digital systems using SystemVerilog/UVM. + Experience… more
- Palo Alto Networks (Santa Clara, CA)
- …to validate critical interfaces. Within the Hardware team, you collaborate closely with Board Design , ASIC Design , PCB Layout, and Validation Test. You will ... Component Engineers. **Your Impact** + Collaborate with a cross-functional team including: ASIC , Board design , PCB layout, Operations supply base management,… more
- NVIDIA (Santa Clara, CA)
- …grasp of ASIC verification methodologies. What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC, with a ... + Develop and complete test plans for cache coherency verification of ASIC -based SoCs using UVM-based environments. + Design and implement constrained-random… more
- Cisco (San Jose, CA)
- …in Python for validating functionality, performance, and power metrics + Collaborate with ASIC design team to ensure thorough coverage and test completeness + ... working together to ensure the successful verification of the ASIC throughout its lifecycle. Operating at the forefront of...+ Analyze and root-cause silicon failures, work closely with design teams to drive resolution + Automate test execution… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more
- NVIDIA (Santa Clara, CA)
- …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer!...teams at NVIDIA. + Work closely with software, architecture, design , verification, and silicon validation teams. + Train and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... Qualifications - BS + 8yrs or MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block Design … more
- BAE Systems (San Diego, CA)
- …random, self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with FPGA/ ASIC design and verification tools (Mentor Questa or Cadence) + ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop...+ Matlab/Simulink + Working knowledge of VHDL + FPGA Design Experience + Experience creating reusable Verification IP. +… more
- SpaceX (Sunnyvale, CA)
- …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this ... FPGA/ ASIC Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more