• Design Verification Engineer

    Meta (Sunnyvale, CA)
    …at the entire stack, through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you will work with ... for multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work… more
    Meta (08/01/25)
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  • SoC Physical Design Engineer

    Meta (Sunnyvale, CA)
    …stack, from transistor, through architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will perform physical ... needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities: 1. Physical design...joining Meta 6. 3+ years of hands-on experience in ASIC physical design with solid understanding of… more
    Meta (08/01/25)
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  • SOC Physical Design Engineer

    Amazon (Sunnyvale, CA)
    …that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a ... Work hard. Have fun. Make history. As a Physical Design Engineer , you will: - Work with...Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET… more
    Amazon (07/27/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (07/04/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Los Angeles, CA)
    …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
    Silvus Technologies (06/13/25)
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  • Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …high-performance SOCs and their constituent IPs. What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC. + ... as AMBA (AXI, CHI, ACE, ATB) and PCIe. We are specifically seeking a skilled ASIC Verification Engineer with deep knowledge of System Verilog, UVM, and C++,… more
    NVIDIA (08/12/25)
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  • Senior Analog/mixed-signal IC Design

    Cisco (San Jose, CA)
    Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC ....optimize design that will integrate into the ASIC . Our team interacts with other Acacia groups including… more
    Cisco (08/08/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... **Responsibilities** + Own and drive the development of microarchitecture and RTL design , coding, and verification of complex IP blocks, including: + Mixed-signal… more
    Microsoft Corporation (07/25/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... sign-of. tools in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design flows, and methodologies including synthesis, place… more
    Amazon (06/03/25)
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  • Physical Design Lead Engineer

    Cisco (San Jose, CA)
    Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295) + Location:San Jose, California, US + Area of InterestEngineer - ... As a Technical Leader, you will be responsible for overseeing the design and verification of application-specific integrated circuits (ASICs), ensuring they meet… more
    Cisco (06/25/25)
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