- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in technology innovation, is seeking a Hardware Design Engineer 4 to join their team. As a Hardware Design Engineer 4, you will be ... abilities which will align successfully in the organization. **Job Title: Hardware Design Engineer 4** **Location: Mountain View, CA - Onsite** **Pay… more
- Meta (Menlo Park, CA)
- …at maximum reliability, scalability, and efficiency. **Required Skills:** Network Production Engineer , Design Responsibilities: 1. Design network topologies ... at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network....Understanding of different Optics and internals of a switch ASIC 20. Familiarity with the Linux based systems **Public… more
- Qualcomm (San Diego, CA)
- …performance, power and area. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep ... Engineering Group, Engineering Group > GPU ASICS Engineering **General Summary:** The Design Implementation Engineer will work in Qualcomm's Adreno GPU team… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish ... yourself as an integral member of a design verification team for the development of AI components... verification with a delivering complex Application Specific Integrated Circuits( ASIC ) or System on Chip(SOC). **Other requirements:** Ability to… more
- Qualcomm (Santa Clara, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... Signal Integrity, Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus) + Expert in… more
- Capgemini (San Jose, CA)
- …data structures, and algorithms. The ideal candidate will have experience in ASIC design and development within Linux-based environments. Proficiency in version ... and optimize data structures and algorithms to solve complex problems. + Support ASIC design and verification processes. + Develop and manage projects in… more
- NVIDIA (Santa Clara, CA)
- …integrated logic analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic ... We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software… more
- Google (Sunnyvale, CA)
- …or equivalent practical experience. + 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced degree. + 3 years of ... experience in technical leadership. + Experience with power circuit design and signal integrity. **Preferred qualifications:** + PhD in Electrical Engineering,… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a growing and dynamic group of ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more