- Google (Mountain View, CA)
- RTL Design Engineer , Multimedia and Machine Learning Accelerators _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, ... or COdec) or Machine Learning IP. + Experience with ASIC design methodologies for clock domain checks...and Hardware to create radically helpful experiences. We research, design , and develop new technologies and hardware… more
- NVIDIA (Santa Clara, CA)
- …and their impacts to circuit/layout implementations and signoff flows + Expert with ASIC design semi-custom and full-custom flow + Hands-on experience running ... part of the Digital IP Team, work with other team members on the new process design challenges, have the chance to create novel low power and high performance… more
- Cisco (San Jose, CA)
- …()25Gb/s), and high accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with ... other Acacia groups including digital/DSP design , system design , package design ,...to $281,400.00 and reflects the projected salary range for new hires in this position in US and/or Canada… more
- SanDisk (Milpitas, CA)
- …Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips and design systems algorithms. + Develop and maintain ... and to the higher management. + Lead discussion of new modes for next generation of NAND Flash or...experience in NAND flash based systems or relevant systems design PREFERRED: + Knowledge of programming in high-level languages… more
- SpaceX (Irvine, CA)
- …environmental conditions specific to space applications + Work closely with the ASIC design team to add/improve testability and define various loopback ... will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this… more
- NVIDIA (Santa Clara, CA)
- …optimization solutions. You will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to ... We are now looking for a Power Optimization Engineer - New College Grad! NVIDIA...skills with go-getter attitude. + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- Cisco (San Jose, CA)
- …the Team** The Cisco Service Provider SI team is seeking a Signal Integrity Engineer for the design and analysis of high-speed components, interfaces, and power ... Switch products, be a part of the definition and design of current and next generation ASIC ,...+ Contribute to the overall SI/PI technology roadmap, evaluating new tools, techniques, and design approaches to… more
- NVIDIA (Santa Clara, CA)
- …equivalent experience) in Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding of modeling circuits for ... a "learning machine" that constantly evolves by adapting to new opportunities that are hard to resolve, that only...ASIC flow. Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond. + Expertise… more
- NVIDIA (Santa Clara, CA)
- …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA prides ourselves in having energy efficient products....power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- Google (Sunnyvale, CA)
- …related field, or equivalent practical experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years of experience with ... FPGA Engineer , Platforms, Hardware _corporate_fare_ Google _place_ Sunnyvale, CA,...an advanced degree. + Experience with Register-Transfer Level design using Verilog or SystemVerilog. + Experience in the… more