• Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …Develop and complete test plans for cache coherency verification of ASIC -based SoCs using UVM-based environments. + Design and implement constrained-random ... place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache...verification methodologies. What you'll be doing: + Responsible for ASIC design verification for various processing blocks… more
    NVIDIA (09/25/25)
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  • RFIC Design Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink...design + Assist in the development of automated test lab equipment for lab measurements + Work with… more
    SpaceX (07/24/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital ... our industry leading virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block… more
    Meta (08/01/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... + LINT + CDC (Clock Domain Crossing) + DRC ( Design Rule Checking) + Develop basic test ...trade-offs, post-silicon debug, and successful delivery of IP and ASIC /SoC designs. + 7+ years of experience in high-speed… more
    Microsoft Corporation (09/30/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...of signal processing blocks. * RTL coding, simulation, and test bench development. * FPGA synthesis and timing closure.… more
    Silvus Technologies (10/03/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
    Silvus Technologies (08/18/25)
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  • Design Verification Engineer

    ManpowerGroup (Santa Clara, CA)
    …Verilog, System Verilog, and modern verification libraries like UVM. + 10+ years of ASIC design verification experience. + Experience or background with DDR or ... a leader in the technology industry, is seeking a Design Verification Engineer to join their team....verification. + Build directed and random verification tests, debug test failures to determine the root cause, and collaborate… more
    ManpowerGroup (09/27/25)
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  • Senior Principal Design Verification…

    BAE Systems (San Diego, CA)
    …random, self-checking testbenches in SystemVerilog/UVM, OVM, and/or VHDL + Experience with FPGA/ ASIC design and verification tools (Mentor Questa or Cadence) + ... may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO Career… more
    BAE Systems (09/09/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates for ... phases of SoC DFT related activities for Broadcom APD ( ASIC Products Division)'s designs - DFT Architecture, Test...test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure.… more
    Broadcom (09/05/25)
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  • FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …Collaborate across hardware and software teams for smooth integration + Create and maintain design documentation and review test outcomes What You'll Need: + BS ... minds in the industry. If you're passionate about digital design , solving complex problems, and building products that make...advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You'll play a vital role in… more
    Tarana Wireless (09/17/25)
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