- Meta (Sunnyvale, CA)
- …synthesis (CTS), routing, static timing analysis and signoff 2. Collaborate with RTL design , DFT, verification , and power teams to ensure seamless integration ... prior to joining Meta 6. 3+ years of hands-on experience in ASIC physical design with solid understanding of digital design fundamentals 7. Proficient… more
- Amazon (Cupertino, CA)
- …documented and well tested software - Close collaboration with RTL designers, design verification engineers, and other software teams - Mentoring of ... Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire… more
- Google (Sunnyvale, CA)
- …Product teams to ensure that goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification of ... Staff Hardware Systems Design Engineer, Board and Systems + _link_ Copy...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
- Silvus Technologies (Irvine, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Cupertino, CA)
- …upon, documented, tested, and reused - Close collaboration with RTL designers, design verification engineers, other software teams and customers Basic ... Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire… more
- Broadcom (San Jose, CA)
- …and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and ... you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer. In this highly visible role, you will be contributing… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer, someone who is excited to join a...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- SanDisk (Milpitas, CA)
- …requirements to various functions of Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips and design systems ... products + Work with Architecture and Firmware team on detailed implementation and verification plan. + Monitor NAND readiness and work with Product test teams on… more
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