• Physical Design Lead Engineer

    Cisco (San Jose, CA)
    …As a Technical Leader, you will be responsible for overseeing the design and verification of application-specific integrated circuits (ASICs), ensuring they ... Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295) + Location:San Jose,...Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification + Experience… more
    Cisco (06/25/25)
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  • Systems Engineer (Entry-level, Associate…

    The Boeing Company (El Segundo, CA)
    …integration and performance simulations. + Support ASIC and FPGA level system design and verification . + Support hardware procurement, design reviews, ... and Launch Engineering team in **El Segundo, California** , to design and develop state-of-the-art, space-based communication systems for commercial, civil, and… more
    The Boeing Company (07/18/25)
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  • SOC Physical Design Engineer, Hardware…

    Amazon (Sunnyvale, CA)
    …with the RTL/Arch. Teams Basic Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such as 5nm/7nm, 14/16nm ... (examples: Cadence, Mentor Graphics, Synopsys, or Others) to block design for synthesis, formal verification , floor planning,...Others) to block design for synthesis, formal verification , floor planning, bus / pin planning, place and… more
    Amazon (07/27/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    …beyond. **Responsibilities** + Own and drive the development of microarchitecture and RTL design , coding, and verification of complex IP blocks, including: + ... Rule Checking) + Develop basic test benches. + Support verification , DFT ( Design for Test), and post-silicon...trade-offs, post-silicon debug, and successful delivery of IP and ASIC /SoC designs. + 7+ years of experience in high-speed… more
    Microsoft Corporation (07/25/25)
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  • Physical Design Engineer (eInfochips Inc)

    Arrow Electronics (Santa Clara, CA)
    **Position:** Physical Design Engineer (eInfochips Inc) **Job Description:** **Position: Sr. Physical Design Engineer (eInfochips Inc)** **Location: USA ... (Relevant) **What candidate will Be Doing:** + Cadence Physical Design P&R flow + Block level floor planning and...by a minimum of 8 years of experience in ASIC or a related field, or a master's degree… more
    Arrow Electronics (07/25/25)
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  • Principal Design Engineer Manager - AI…

    Microsoft Corporation (Mountain View, CA)
    … including microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure. + 3+ years ... Control, Topologies, Load Balancing, Traffic pattern, Uniform Latency) + Experience leading logic design teams + Multiple successful ASIC tape outs in deep… more
    Microsoft Corporation (07/18/25)
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  • High Speed SerDes RTL Design Engineer

    Broadcom (San Jose, CA)
    …in advanced modulation formats.** + **Experience in integrating the front end design with DV for test methodologies and verification . Providing guidelines ... **Evaluating timing signoff, verification and IP Integration and system level verification .** + **Experience in design management with detailed knowledge of… more
    Broadcom (07/11/25)
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  • Electrical Post Silicon Validation Engineer

    Cisco (San Jose, CA)
    …in Python for validating functionality, performance, and power metrics + Collaborate with ASIC design team to ensure thorough coverage and test completeness + ... and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle....+ Analyze and root-cause silicon failures, work closely with design teams to drive resolution + Automate test execution… more
    Cisco (06/25/25)
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  • Processor RTL Design Engineer (Multiple…

    Qualcomm (San Diego, CA)
    …Modem, Machine learning, IoT and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by ... design , design partitioning, + simulation and regression, collaboration with design verification team. Experience with the following disciplines is highly… more
    Qualcomm (07/17/25)
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  • Graphics ASICS Hardware Design Engineer…

    Qualcomm (San Diego, CA)
    …Synopsys synthesis, low power design , test plan development, coverage-based design verification + Experience with Computer Architecture, Computer Arithmetic, ... design Develop RTL for the corresponding micro architecture Provide essential verification and debugging activities for the corresponding design throughout… more
    Qualcomm (07/04/25)
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