- Qualcomm (San Diego, CA)
- …Synopsys synthesis, low power design , test plan development, coverage-based design verification + Experience with Computer Architecture, Computer Arithmetic, ... design Develop RTL for the corresponding micro architecture Provide essential verification and debugging activities for the corresponding design throughout… more
- Meta (San Diego, CA)
- …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
- Amazon (Sunnyvale, CA)
- …design process from Design specification, defining architecture, micro-architecture, RTL design and functional verification * Experience with DFT and DFM ... of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of...STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip… more
- Microsoft Corporation (Mountain View, CA)
- …timing closure, etc + Collaborate with team members to define interfaces and make optimal design choices + Work with the verification teams to develop test plans ... engineering experience OR equivalent experience. + 4+ years of experience in digital logic design for ASIC or FPGA + 4+ years of logic design flow experience… more
- Amazon (Cupertino, CA)
- …documented and well tested software - Close collaboration with RTL designers, design verification engineers, and other software teams - Mentoring of ... Description Annapurna Labs stands at the forefront of hardware/software co- design , leading innovation not just within Amazon Web Services (AWS) but across the entire… more
- Meta (Sunnyvale, CA)
- …synthesis (CTS), routing, static timing analysis and signoff 2. Collaborate with RTL design , DFT, verification , and power teams to ensure seamless integration ... prior to joining Meta 6. 3+ years of hands-on experience in ASIC physical design with solid understanding of digital design fundamentals 7. Proficient… more
- Amazon (Cupertino, CA)
- …and sign-of. tools in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design flows, and methodologies including ... for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our...synthesis, place and route, STA, formal verification . - Proven track record of delivering metric driven… more
- Silvus Technologies (Irvine, CA)
- …career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Pasadena, CA)
- …FPGA prototyping, synthesis, debugging, and validation of algorithms. - Working knowledge of ASIC design tools and development. Amazon is an equal opportunity ... the use of Altium or Cadence CAD software for high-speed PCB design and verification . - Knowledgeable in the use of op-amps, biasing circuits, filtering, clock… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
Recent Jobs
-
Process Development Senior Scientist - Analytical Development
- Amgen (Thousand Oaks, CA)
-
Assistant Director of Clinical Services - Home Health
- Phoenix Home Care and Hospice (St. Louis, MO)
-
Internal Auditor
- L Brands, Inc. (Columbus, OH)
-
Communication Specialist II
- Iowa State University (Ames, IA)