• ASIC Engineer, Implementation

    Meta (Sunnyvale, CA)
    …"Apply to Job" online on this web page. **Required Skills:** ASIC Engineer, Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... level and identify power reduction opportunities. 4. Run formal verification checks between RTL & gate level netlist and...domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and… more
    Meta (04/09/25)
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  • ASIC Physical Design Technical…

    Cisco (San Jose, CA)
    …ASICs being developed in the industry. Your Impact You'll be joining our Physical Design team at Cisco Silicon One group, which is responsible for the entire ... Power Grid planning for lower technology nodes. * Fullchip Physical Verification . Minimum Qualifications * Bachelor's degree in Electrical Engineering or equivalent… more
    Cisco (05/02/25)
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  • ASIC DFT Product Lead

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... be in the Silicon One development organization as an ASIC DFT Product Lead in San Jose, CA with...in San Jose, CA with a primary focus on Design -for-Test and Product qualification activities Key Responsibilities: * Responsible… more
    Cisco (02/12/25)
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  • ASIC /SoC, Account Technical Executive

    Cadence Design Systems, Inc. (San Jose, CA)
    …the core technology requirements in the digital implementation and/or functional/formal verification space , coordination of sales strategies and efforts across ... route and signoff) and/or experience with functional and formal verification tools/methodology, VIP. Understanding of semiconductor manufacturing eco-systems. Understanding… more
    Cadence Design Systems, Inc. (03/28/25)
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  • Principal / Senior Principal Digital…

    Northrop Grumman (Mcclellan, CA)
    …security clearance with Polygraph. + Experience with Mentor Graphics and/or Cadence Verification tools - FPGA/ ASIC Design experience Northrop Grumman ... safe from undersea to space and cyberspace. We are seeking digital verification engineers for our development of full-custom digital and mixed signal superconducting… more
    Northrop Grumman (04/30/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification , logic synthesis, timing ... many other teams at NVIDIA. + Work closely with software, architecture, design , verification , and silicon validation teams. + Train and mentor junior engineers… more
    NVIDIA (03/13/25)
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  • Senior Manager, Engineering Manager

    L3Harris (Anaheim, CA)
    …system integration, validation, and verification , covering all phases in the ASIC Design Development Cycle. You will support the Integrated Mission Systems ... adjusting staffing levels as necessary to ensure that the ASIC Design workface is appropriately staffed with...to guide/direct ASIC engineers to create requirements, design descriptions, verification plans/procedures, customer CDRLs to… more
    L3Harris (03/30/25)
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  • Sr. IC Layout Engineer (Starlink)

    SpaceX (Sunnyvale, CA)
    …engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification , post-silicon ... providing fast, reliable internet to 5M+ users worldwide. We design , build, test, and operate all parts of the...You will be an integral part of the IC design team and lead the discipline of layout at… more
    SpaceX (04/15/25)
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  • Senior E/E & Semiconductor Engineer - CAD/EDA…

    Capgemini (San Francisco, CA)
    **Job Summary:** We are seeking a skilled CAD Infrastructure engineer to support our ASIC design team. The ideal candidate will be responsible for developing and ... ensuring efficient design workflows, and supporting the design and verification of ASICs. **Required Skills:**.... Knowledge of industry standards and best practices in ASIC design . . This role is crucial… more
    Capgemini (05/02/25)
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  • Design Verification Engineer IV

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer IV **Job Description:** **What You'll Be Doing:** + Responsible for architecting Verification Environment for ... ASIC SoC and providing verification support from defining verification plan to...to multi-million gate product tape out & for Test design and development. + Develop complex self-checking test benches… more
    Arrow Electronics (05/10/25)
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