• Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... you will play a critical role in shaping the architecture, design , implementation, and verification of DFT IPs for our next-generation SoC products. You'll help… more
    NVIDIA (10/25/25)
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  • Hardware Engineer I (Co-op) - United States

    Cisco (San Francisco, CA)
    …Build and sustain strong relationships with cross-functional teams while collaborating on ASIC Design and Verification for reliable, high-performance ... Team ** Engineering: Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of… more
    Cisco (11/14/25)
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  • ASIC Modem Design Engineer, Amazon…

    Amazon (San Diego, CA)
    …at Amazon! We're hiring a Modem Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop ... first-time right silicon solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your block. . Work with… more
    Amazon (09/13/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Verification Engineer! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the world's ... and performance of PCIe and CXL designs + Understand the design , define the verification scope, develop the verification infrastructure, and verify the… more
    NVIDIA (10/18/25)
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  • Nvidia 2026 Internships: Hardware ASIC

    NVIDIA (Santa Clara, CA)
    By submitting your resume, you're expressing interest in one of our 202 6 Hardware ASIC Design Internships. We'll review resumes on an ongoing basis, and a ... areas could be required : + Digital Systems, Digital Design , VLSI Design , RTL Design...Power/Clock Distribution, Packaging, P&R and Timing Closure + Performance, Verification , and Emulation Methodology Depending on the internship role,… more
    NVIDIA (09/02/25)
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  • ASIC Engineer, Networking Architecture…

    Meta (Menlo Park, CA)
    …center networking architecture, network system design , micro-architecture, RTL design , Design Verification , Firmware/Software development, Pre-Post ... **Summary:** As a Networking ASIC Engineer on the Infrastructure Silicon team at...Support networking model development, performance analysis, and correlation with design implementation 5. Work with software and firmware teams… more
    Meta (10/20/25)
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  • ASIC Design Engineer

    Meta (Sunnyvale, CA)
    …click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. ... Responsible for Lint, CDC, Synthesis, & Power Optimization. 4. Collaborate with verification and emulation teams in test planning, development, and debugging. 5.… more
    Meta (11/14/25)
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  • Senior Electrical Engineer - ASIC /FPGA…

    RTX Corporation (El Segundo, CA)
    …Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, verification , and system integration + Recommend ... or Computer engineering candidate to be involved in the design , implementation, verification , and integration of a...tools and practices for continuous improvement in the group's ASIC / FPGA design flow + Contribute… more
    RTX Corporation (10/28/25)
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  • Senior Technical Program Manager - DFX Engineering

    NVIDIA (Santa Clara, CA)
    …in semiconductor program management or engineering leadership. + Strong understanding of ASIC /SoC design , verification , bring-up, and productization flows ... We seek a Senior Technical Program Manager to lead Design -for-Test (DFX) engineering programs for our next-generation chip designs. This role sits at the… more
    NVIDIA (10/17/25)
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  • SystemVerilog/UVM Design

    US Tech Solutions (Goleta, CA)
    …assigned verification tasks. **Experience:** + 5-8 years of experience in Pre-Silicon Design Verification (FPGA or ASIC ). + Strong proficiency in ... be able to automate test or regression flows **Skills:** + UVM/System Verilog + Design Verification + Ethernet, SPI, AXI, JTAG + SDF and GLS simulations + Python… more
    US Tech Solutions (10/14/25)
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