• GPU Formal Verification Engineer (Multiple…

    Qualcomm (Austin, TX)
    …Systems Engineering, or related work experience. **Preferred Qualifications:** + 3 years ASIC design , verification, or related work experience + Verification ... to help create a smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design , implement, verify, and/or optimize the performance and… more
    Qualcomm (05/15/25)
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  • Power Methodology and Modeling Engineer

    NVIDIA (Austin, TX)
    …of the Architecture Energy Modeling Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... and comment on their runtime and memory complexities. + Understanding of VLSI, digital design , and computer architecture concepts. + Basic understanding of… more
    NVIDIA (05/10/25)
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  • FPGA Design Lead

    Lockheed Martin (Grand Prairie, TX)
    …FPGA engineer with a strong background in FPGA architecture design , development, and implementation\. You're a proficient leader with excellent communication ... and debugging with board\-level testing and FPGA validation \- Experience in ASIC / FPGA life cycle \(architecture, design , simulation, verification, validation,… more
    Lockheed Martin (05/15/25)
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  • Sr. Coherent Interconnect Micro-architect/Logic…

    Samsung Electronics Co., Ltd. (Austin, TX)
    … designs + Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design , verification, logic synthesis, prototyping, ... work on logic debug and timing closure of the design . Solid engineer foundation and RTL ...+ Good written and verbal communication skills. + Efficient digital design techniques. Our Team Our System… more
    Samsung Electronics Co., Ltd. (05/06/25)
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  • Principal Memory Controller Micro-Architect/Logic…

    Samsung Electronics Co., Ltd. (Austin, TX)
    digital designs + Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design , verification, logic synthesis, timing ... optimization, and also work on logic debug and timing closure of the design . Solid engineer foundation and RTL design experience are desired for success. +… more
    Samsung Electronics Co., Ltd. (04/21/25)
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