• Senior FPGA / Rtl Design Engineer - Signal…

    Silvus Technologies (Los Angeles, CA)
    …and responsibilities at any time at its discretion. ROLE AND RESPONSIBILITIES + Digital design architecting for wireless communication projects. + Fixed point ... OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer - Signal Processing_** who will report to...MATLAB. + Experience with communication systems on FPGA or ASIC designs. WORKING CONDITIONS & PHYSICAL REQUIREMENTS… more
    Silvus Technologies (10/08/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …its discretion. ROLE AND RESPONSIBILITIES * Working with system engineers and digital design architecting for wireless communication projects, including fixed ... Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering...* Demonstrated experience with fixed point binary arithmetic and digital signal processing designs. * Deep knowledge of RTL… more
    Silvus Technologies (10/03/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …and responsibilities at any time at its discretion. ROLE AND RESPONSIBILITIES + Digital design architecting for wireless communication projects. + Fixed point ... a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA… more
    Silvus Technologies (11/17/25)
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  • RFIC Design Engineer (Silicon Engineering)

    SpaceX (Irvine, CA)
    RFIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... possible, with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building… more
    SpaceX (10/04/25)
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  • Sr. RFIC Design Engineer

    SpaceX (Hawthorne, CA)
    Sr. RFIC Design Engineer Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more ... the ultimate goal of enabling human life on Mars. SR. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to… more
    SpaceX (11/18/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer, someone who is excited to join a...mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed… more
    NVIDIA (11/13/25)
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  • Senior Mask Design Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer, someone who is excited to join a...mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed… more
    NVIDIA (08/28/25)
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  • Technologist , Systems Design Engineering

    SanDisk (Milpitas, CA)
    …Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk ... of Memory teams to meet systems specs. + Define ASIC requirements for upcoming new NAND Flash based chips...requirements for upcoming new NAND Flash based chips and design systems algorithms. + Develop and maintain a System… more
    SanDisk (10/04/25)
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  • Chip Integration Engineer

    Broadcom (San Jose, CA)
    …academic standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical design considerations. 3). Thorough ... brought some of the most complex and cutting-edge networking ASIC 's and multichip solutions to market over the last...working on initial floor plan. 5). Develop Verilog RTL. design verification support, logic synthesis, physical implementation… more
    Broadcom (11/19/25)
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  • Senior Technical Lead - Signal / Power Integrity…

    Cisco (San Jose, CA)
    …structures. + Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs. + Write signal integrity design guidelines, test plans, ... ASIC , package, PCB, system). + Lead comprehensive SI/PI design reviews, providing expert guidance and ensuring adherence to...power how humans and technology work together across the physical and digital worlds. These solutions provide… more
    Cisco (11/13/25)
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