• Senior Reset and Boot ASIC Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's...implement the world's leading GPU and SoC's. With the System- ASIC team, you will contribute to designing multiple products… more
    NVIDIA (06/18/25)
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  • ASIC Engineer , Infra Silicon…

    Meta (Sunnyvale, CA)
    …Pre/Post Silicon Validation to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Pre/Post Silicon Validation Lead Responsibilities: 1.… more
    Meta (08/01/25)
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  • ASIC Engineer , Design Verification

    Meta (Menlo Park, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design… more
    Meta (08/01/25)
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  • ASIC Engineer , Architecture…

    Meta (Menlo Park, CA)
    **Summary:** As an ASIC Engineer on the Hardware Testing Infrastructure team at Meta, you will be a key player in defining the testing approach, creating the ... and infrastructure needed to excel in their roles. **Required Skills:** ASIC Engineer , Architecture Infrastructure Responsibilities: 1. Communicate your… more
    Meta (08/13/25)
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  • ASIC Engineer

    ManpowerGroup (Folsom, CA)
    Our client, a leading technology firm, is seeking an ASIC Engineer to join their team. As an ASIC Engineer , you will be part of the engineering ... a collaborative mindset which will align successfully in the organization. **Job Title:** ASIC Engineer **Location:** Folsom, CA **Pay Range:** $90/hr - $105/hr… more
    ManpowerGroup (08/15/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design… more
    Meta (08/01/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design… more
    Meta (08/01/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design… more
    Meta (08/01/25)
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  • ASIC Engineer , Formal Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal… more
    Meta (08/01/25)
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  • ASIC Engineer , Physical Design

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....physical design of an end-to-end IP or integration of ASIC /SoC design and point out lower power and higher… more
    Meta (08/07/25)
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