- Google (Sunnyvale, CA)
- SoC Physical Design Engineer corporate_fare Google place Sunnyvale, CA, USA Mid Experience driving progress, solving problems, and mentoring more junior team ... for complex SoC. Experience with multiple-cycles of SoC in ASIC design. Experience with scripting languages such as Perl,...As a System on a Chip (SoC) Physical Design Engineer , you will collaborate with Register-Transfer Level (RTL), Design… more
- Apple (Sunnyvale, CA)
- …from concept through production. As a Wireless Radio Verification Engineer , you'll ensure first-time-right silicon success through sophisticated testbenches, ... connecting the world! Description As a Wireless Radio Verification Engineer , you will be at the core of our...track record of successful silicon tapeouts. Deep knowledge of ASIC verification flows with SystemVerilog and UVM including testbench… more
- L3Harris (Yorba Linda, CA)
- …Linda, CA. Schedule: 4/10 (off every Friday) Job Description: As a Lead Electrical Engineer , the candidate must have experience with L band RF systems, able to work ... description document, etc.) and flow down applicable requirements to other groups (software, ASIC , & test) so that they can contribute to realize the end solution… more
- Apple (San Francisco, CA)
- …products for hundreds of millions of customers. As a PHY Design Verification Engineer , you will be responsible for pre-silicon RTL verification of wireless PHY and ... and UVM. Knowledge of SystemVerilog Assertion. Knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and… more
- Broadcom (Irvine, CA)
- …lab debugging experiences Good Knowledge in languages relevant to the ASIC /system development process including Verilog, Unix/Perl Scripting or Python, matlab and ... C. Self-motivated, excellent communication skills and ability to excel in a team environment. Good organization skills, able to follow through & bring issue to closure FEC knowledge is a plus Knowledge Backplane/cable/optical fiber communication Be able to… more
- SanDisk (Milpitas, CA)
- …high-speed signal routing, power delivery, and mechanical integration. Collaborate with ASIC , firmware, mechanical, and system teams to meet performance, thermal, ... and reliability requirements. Develop and execute bring up, validation and debug plans using oscilloscopes, logic analyzers, and other lab instruments. Ensure compliance with PCIe, ESD, EMI and power management standards for next-generation NAND Flash… more
- Capgemini (San Francisco, CA)
- …least 5-8 years of experience in complex semiconductor services sales, particularly in ASIC design services. Minimum of 5 years in Sales Pursuit Management. Minimum ... relationships with foundries, EDA companies, and IP providers. Background in ASIC Design or Semiconductor Technology R&D is advantageous, ideally with experience… more
- Apple (San Diego, CA)
- …system and display roadmaps. Description We are looking for a resourceful engineer and architect to develop next-generation sensing HW systems on Apple's innovative ... responsible for architecting the end-to-end sensing system - including sensor, ASIC requirements, back-end algorithms and calibration needs. You will be delivering… more
- Cisco (San Jose, CA)
- **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End implementation flow ... **Summary:** Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure organization....tools development and automation to help improve productivity across ASIC design cycles including but not limited to RTL… more
