• Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Los Angeles, CA)
    …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
    Silvus Technologies (01/06/26)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (01/02/26)
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  • Senior Hardware System Design

    Broadcom (San Jose, CA)
    …and production boards using cutting-edge Broadcom SOCs. We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design to ... critical components. + Collaborate closely with cross-functional teams, including ASIC , SI, PI, DVT, Sysops, Software, AE, and Mechanical/Thermal,...8+ years of proven experience as a Hardware Systems Design Engineer , with a focus on system… more
    Broadcom (11/04/25)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Irvine, CA)
    …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
    Silvus Technologies (11/17/25)
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  • SystemVerilog/UVM Design Verification…

    US Tech Solutions (Goleta, CA)
    …ownership of verification deliverables within a UVM/SystemVerilog environment. + The engineer will collaborate with design , architecture, and validation teams ... **Job Description:** + The Verification Engineer will contribute to the pre-silicon functional verification...tasks. **Experience:** + 5-8 years of experience in Pre-Silicon Design Verification (FPGA or ASIC ). + Strong… more
    US Tech Solutions (10/14/25)
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  • Package Design Engineer

    Broadcom (San Jose, CA)
    …you apply.** **Job Description:** Broadcom is seeking an experienced IC package- design engineer for complex flip-chip-BGA packages for industry-leading ASICs ... to efficiency improvements for our design team. **RESPONSIBILITIES:** + Overall design responsibility for ASIC package designs, including aspects of signal… more
    Broadcom (12/02/25)
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  • Physical Design Methodology Engineer

    Amazon (Cupertino, CA)
    …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... sign-of. tools in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design flows, and methodologies including synthesis, place… more
    Amazon (12/02/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
    NVIDIA (12/11/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... for a Senior Mask Layout Design Engineer , someone who is excited to...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
    NVIDIA (11/27/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP ... Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA … more
    Cadence Design Systems, Inc. (10/11/25)
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