• Hardware Engineer

    Meta (Menlo Park, CA)
    …and remote teams and suppliers, to define product roadmap and program 2. Specify, design , and develop CPU/GPU/ ASIC based compute hardware solutions, and ASIC ... **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our...Support hyper-scale deployment and obtain learning for next generation design 5. Collaborate with open source hardware community to… more
    Meta (08/01/25)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …equivalent experience) in Electrical or Computer Engineering with 3 years' experience in ASIC Design and Timing. + Good understanding of modeling circuits for ... in the ASIC flow. Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond. + Expertise in coding- TCL, Python.… more
    NVIDIA (07/19/25)
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  • Senior Power Architecture and Optimization…

    NVIDIA (Santa Clara, CA)
    …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA prides ourselves in having energy efficient products....power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
    NVIDIA (09/16/25)
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  • FPGA Engineer , Platforms, Hardware

    Google (Sunnyvale, CA)
    …related field, or equivalent practical experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years of experience with ... FPGA Engineer , Platforms, Hardware _corporate_fare_ Google _place_ Sunnyvale, CA,...an advanced degree. + Experience with Register-Transfer Level design using Verilog or SystemVerilog. + Experience in the… more
    Google (09/28/25)
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  • Senior Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …for passionate, high-energy engineers to help achieve that mission. As a Senior Silicon Engineer - ASIC verification in the Data Processing Unit team you will ... your career. We are looking for a **Senior Silicon Engineer ** to Join our team! **Responsibilities** + Lead key...+ Lead key components of functional validation of complex ASIC SOC using UVM/C test bench + Perform pre-silicon… more
    Microsoft Corporation (10/07/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates for ... phases of SoC DFT related activities for Broadcom APD ( ASIC Products Division)'s designs - DFT Architecture, Test insertion...product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure.… more
    Broadcom (09/05/25)
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  • Principal DSP Engineer - Coherent Optical…

    Cisco (San Jose, CA)
    …efficiency. You'll contribute to system design , develop architectures, and support ASIC design and verification. Work closely with colleagues across various ... Principal DSP Engineer - Coherent Optical Transmission Systems - Acacia...the Team** **Join our team at Acacia, where we design advanced optical transceivers for high-speed fiber optic transmission… more
    Cisco (08/23/25)
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  • Staff Engineer , Networking

    Celestica (San Jose, CA)
    …Country: USA State/Province: California City: San Jose **Summary** We are seeking a **Staff Engineer , Networking** to join our Sonic NOS HDK Vertical team. This is a ... a strong background in NOS architecture, L2/L3 protocol development, ASIC integration, and programming in C/C++. This is a...teams and work at the forefront of NOS software design , enabling advanced networking solutions for data center and… more
    Celestica (08/19/25)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …with 3+ years of CAD experience; MS preferred + Be familiar with Verilog and ASIC design along with experience in commercial EDA tools + Software engineering ... implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams with advanced implementation tasks What we need to… more
    NVIDIA (09/09/25)
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  • Senior System SW Engineer , System…

    Palo Alto Networks (Santa Clara, CA)
    …for next generation firewall products, identify performance bottlenecks and solutions, design and model protocol and sub-component offload solutions. In addition to ... high level design work, you will also do hands-on coding, including:...Development - Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC more
    Palo Alto Networks (09/19/25)
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