• Signal Integrity Engineer

    Meta (Menlo Park, CA)
    …scalability, reliability, and intelligence. We are looking for a Signal Integrity Engineer to support the development of Meta's platforms and help shape the ... for our massively scalable data centers. **Required Skills:** Signal Integrity Engineer Responsibilities: 1. Lead platform-level signal integrity work, including … more
    Meta (08/29/25)
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  • Senior Memory Controller Verification…

    NVIDIA (Santa Clara, CA)
    …need to see: + BS / MS or equivalent experience. + 3+ years of ASIC verification experience of complex design units displaying good attention to detail, ... NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification...computing. In this position, you will partner with the design and architecture teams to help make the right… more
    NVIDIA (10/02/25)
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  • Sr.Test Development Engineer

    Cisco (San Jose, CA)
    …number of applications are received.** **Meet The Team** You will collaborate with ASIC design teams in the Central Hardware Group, peer Test Engineers ... Sr.Test Development Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1448472) + Location:San Jose, California, US...ATE test bring-up. You will partner with the Cisco ASIC team to bring up tests, characterize units, and… more
    Cisco (09/26/25)
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  • Sr. HW Systems Engineer , Project Kuiper

    Amazon (San Diego, CA)
    …underserved communities around the world. Come work at Amazon! As the Gateway Modem Systems Engineer , you will take the lead inside the RF Hardware team to define, ... design , and deliver modem system level engineering requirements. This...hardware. In this role you will: * Coordinate with ASIC , antenna, comm systems, & software teams to help… more
    Amazon (07/11/25)
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  • Emulation Engineer II

    Microsoft Corporation (Santa Clara, CA)
    …software and hardware expertise to create a highly programmable and high-performance ASIC with the capability to efficiently handle large data streams. Thanks to ... its integrated design , this solution empowers teams to operate with increased...performance compared to CPU-based alternatives **Responsibilities** As an Emulation Engineer II in the Data Processing Unit team you… more
    Microsoft Corporation (09/23/25)
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  • Senior Security Firmware Engineer

    SanDisk (Irvine, CA)
    …the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + Contribute to the Security Development Lifecycle of the Firmware by supporting its ... development at different stages, including design , threat analysis, implementation, validation, vulnerability testing, certification, and audit. **Qualifications**… more
    SanDisk (09/18/25)
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  • Digital FPGA Engineer Level 3 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …quickly and continuously drive innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In this ... making history. **Northrop Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 3** with the desire to learn new technologies to join… more
    Northrop Grumman (10/02/25)
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  • Hardware Engineer , Platforms, University…

    Google (Sunnyvale, CA)
    …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Hardware Engineer in the board and system design team, you will ... Hardware Engineer , Platforms, University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, and… more
    Google (09/26/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to GDSII with a strong history of ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...influence the development of software tools for advanced chip design platforms. As engagement focused PE, you will be… more
    Cadence Design Systems, Inc. (09/09/25)
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  • Staff Signal Integrity Engineer , Platforms

    Google (Sunnyvale, CA)
    …and understanding of SERDES capabilities. **About the job** As a Staff Signal Integrity Engineer , you will design and build the systems that are important to ... Staff Signal Integrity Engineer , Platforms _corporate_fare_ Google _place_ Sunnyvale, CA, USA...Experience with product development process for mass volume production design , with a focus on signal integrity, power integrity… more
    Google (09/28/25)
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