- Meta (Sunnyvale, CA)
- …DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT strategies ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to...DFT Engineers within our Infrastructure organization to work on Design for Test (DFT) methodologies, implementation, and verification to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer ! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the ... performance of PCIe and CXL designs + Understand the design , define the verification scope, develop the verification infrastructure,...the verification infrastructure, and verify the correctness of the design What we need to see: + BS or… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... hierarchical reset domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and corresponding reset sequence… more
- NVIDIA (Santa Clara, CA)
- … tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are ... Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis (STA), timing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... from you! What you'll be doing: + Support the deployment of advanced Design -For-Test (DFT) and Automatic Test Pattern Generation (ATPG) solutions + Work with… more
- NVIDIA (Santa Clara, CA)
- …years of EDA tool development in the verification field + Hands on experience with ASIC design and verification + Good with C++ and other programming languages ... stand out from the crowd: + Good understanding of Design for Testing including Scan/ATPG/JTAG. + Strong English communication....working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our GPU… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd:...critical paths. + Background and expertise in high frequency design closure at subsystem level. + Ability to develop… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...architectures, while ensuring high design quality and making the right trade-offs. Our team… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which ... are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers… more