• Sr. CAD Engineer , ASIC

    Amazon (San Diego, CA)
    …high-speed broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining EDA tools and flows ... for project Kuiper's digital design teams. This is an opportunity to define the digital design environment and deploy methodology of a new project from day one.… more
    Amazon (09/05/25)
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  • Senior System ASIC Engineer - Speed…

    NVIDIA (Santa Clara, CA)
    …multifaceted, multi-functional team at NVIDIA. We sit at the crossroads of design , architecture, marketing, and productization. Our involvement begins at the arch ... and implementation plan across multiple business units, translate hardware features design requirements to silicon speed characterization needs and test requirements… more
    NVIDIA (08/09/25)
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  • ASIC Automation and Integration…

    Broadcom (Irvine, CA)
    …for a new line of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products. All aspects of front end ... design will be involved, with strong emphasis on flow...MSEE and 10+ years of industry experience. A strong design background is preferred & the candidate should have… more
    Broadcom (10/02/25)
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  • ASIC Architecture: Runtime Development

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking a highly skilled ASIC Architecture Runtime Development Engineer with experience in hardware modeling, particularly on RISC-V or PCIe ... the reliability and performance of our AI Accelerator. **Required Skills:** ASIC Architecture: Runtime Development Responsibilities: 1. Design and develop… more
    Meta (10/02/25)
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  • Analog/ ASIC , Account Technical Executive

    Cadence Design Systems, Inc. (Irvine, CA)
    …experience required. * Min. 7 years in sales and account management or as a Applications Engineer or Design Engineer with proven track record of success * ... Deep understanding of electronic systems and HW design Be proud and passionate about the work you...modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property… more
    Cadence Design Systems, Inc. (08/22/25)
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  • Physical Design Flow and Methodology…

    Google (Sunnyvale, CA)
    Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... provide recommendations and employ best practices. Your work will streamline ASIC physical design workflows, make our team of physical design engineers… more
    Google (09/28/25)
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  • Design Automation Engineer

    Broadcom (San Jose, CA)
    …guidelines **Knowledge and Experience required:** + A good understanding of IP & ASIC design methodologies + Extensive experience with EDA DRC/LVS support + ... already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** Design Automation Engineer ** This position is part of a team tasked… more
    Broadcom (07/28/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon AI Research team. We build research silicon to demonstrate and ... for next generation AI and AR solutions.As a Digital Design Engineer (DDE), you will be a...ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11.… more
    Meta (09/09/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... plan to multi-million gate product tapeout & for Test design and development * Develop complex self checking test...test FW and create test plan documentation to cover ASIC features. * Develop and debug SoC ASIC… more
    Arrow Electronics (09/25/25)
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  • RTL Design Engineer (eInfochips)

    Arrow Electronics (Santa Clara, CA)
    **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role: RTL Design Engineer ** **Location: San Jose CA (Remote)** **Experience: 10+ ... + Lead silicon bring-up activities, troubleshoot, and debug PCIe related issues. + ASIC Design and Development: + Design , implement, and verify ASIC … more
    Arrow Electronics (09/30/25)
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