• RFIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    RFIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...CMOS processes + Work with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software… more
    SpaceX (01/03/26)
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  • RFIC Design Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    RFIC Design Engineer (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... possible, with the ultimate goal of enabling human life on Mars. RFIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch… more
    SpaceX (10/23/25)
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  • Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …grasp of ASIC verification methodologies. What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC, with a ... place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache...and complete test plans for cache coherency verification of ASIC -based SoCs using UVM-based environments. + Design more
    NVIDIA (12/19/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers and engineers, and use your digital ... ICs to drive our industry leading wearable systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level… more
    Meta (12/20/25)
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  • Physical Design Engineer , Google…

    Google (Sunnyvale, CA)
    Physical Design Engineer , Google Cloud _corporate_fare_ Google...route for SoC or with multiple-cycles of SoC in ASIC design . **About the job** In this ... on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL, design for testing (DFT),… more
    Google (12/25/25)
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  • RTL Design Engineer , University…

    Google (Sunnyvale, CA)
    RTL Design Engineer , University Graduate, PhD, Machine Learning _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... and its integration within AI/ML-driven systems. As an RTL Design Engineer , you will be part of... and document one or more blocks of an ASIC , including functionality and timing. + Work closely with… more
    Google (12/18/25)
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  • SoC Physical Design Engineer

    Google (Sunnyvale, CA)
    SoC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more junior ... complex SoC. + Experience with multiple-cycles of SoC in ASIC design . + Experience with scripting languages...systems. As a System on a Chip (SoC) Physical Design Engineer , you will collaborate with Register-Transfer… more
    Google (12/11/25)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate with brilliant minds to build cutting-edge GPUs ... everything from AI to gaming! As a Senior SOC Design Engineer , you'll work at the forefront...technology, integrating advanced ASICs, and partnering with experts in ASIC design , Physical design , CAD,… more
    NVIDIA (12/10/25)
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  • Staff Logic Design Engineer

    Teledyne (Milpitas, CA)
    …and networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team ... Join our high-speed Protocol Team as a **Staff** **Logic Design Engineer ** , where you'll architect and...plus + **7+ years** of experience in digital logic design for FPGA or ASIC . + Strong… more
    Teledyne (11/18/25)
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  • Principal FPGA / Rtl Design Engineer

    Silvus Technologies (Irvine, CA)
    …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
    Silvus Technologies (01/02/26)
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