- Silvus Technologies (Irvine, CA)
- …of your career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Qualcomm (San Diego, CA)
- …* Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work experience. ... an experienced candidate for the position of SoC Debug Engineer . **Key Responsibilities** In this role, the candidate will...Science, Engineering, or related field and 3+ years of ASIC design , verification , validation, integration,… more
- NVIDIA (Santa Clara, CA)
- …analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification , logic synthesis, timing ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...teams at NVIDIA. + Work closely with software, architecture, design , verification , and silicon validation teams. +… more
- Qualcomm (San Diego, CA)
- …* Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design , verification , validation, integration, or related work experience. ... degree in Science, Engineering, or related field and 5+ years of ASIC design , verification , validation, integration, or related work experience. OR PhD… more
- Meta (Sunnyvale, CA)
- …(Power, Performance, and area) of the design . **Required Skills:** Silicon Physical Design Engineer Responsibilities: 1. Develop and own physical design ... route, static timing analysis, IR Drop, EM, and physical verification in advanced technology nodes. 2. Resolve design...equivalent practical experience. 7. 10+ years of experience in ASIC Physical Design 8. Understanding of RTL2GDSII… more
- Google (Sunnyvale, CA)
- …TPU architecture and its integration within AI/ML-driven systems. As a Custom Datapath Physical Design Engineer on the Chip Implementation team, you will work on ... equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced...behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design ...and methodologies including synthesis, place and route, STA, formal verification . - Proven track record of delivering metric driven… more
- Broadcom (San Jose, CA)
- …Hands-on expertise with Physical verification and place-and-route tools for ASIC /SoC design is essential **Education/Experience:** + BS degree in Electrical ... please Sign-In before you apply.** **Job Description:** Broadcom is looking for a Design Implementation Engineer with demonstrated expertise in key areas such as… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... for a Senior Mask Layout Design Engineer , someone who is excited to...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
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