- Google (Sunnyvale, CA)
- …bit-accurately model the custom accelerator ASICs. Build tools and infrastructure to help ASIC design verification , tapeout, and bring-up. Develop embedded ... Senior Staff Software Engineer , ASIC , Platforms Infrastructure Engineering _corporate_fare_...design and develop tools to update and debug ASIC firmware. Enable chip bring-up and hardware debugging. +… more
- NVIDIA (Santa Clara, CA)
- We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is versatile, educational, dynamic and ... advanced AI data centers. We are seeking a senior verification engineer to help us ensure the...equivalent experience + 8+ years of proven experience in Design Verification . + Proven, hands-on experience verifying… more
- Google (Sunnyvale, CA)
- …chip execution by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer , you will be the catalyst for ... Senior Design Verification and Methodology Engineer...Methodologies to address and resolve critical issues in current ASIC and SoC design and verification… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL/ Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- Amazon (Sunnyvale, CA)
- …time to revenue. Innovators will be delighted with our integrated verification /validation environment that is used to perform architectural modeling to post-silicon ... power, performance, and area for significant IPs early in design cycle -Execute on design specifications to...Analysis and STA -Take the lead and work with verification teams to define functional coverage -Work with pre-silicon… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... level and identify power reduction opportunities. 4. Run formal verification checks between RTL & gate level netlist and...domain crossing checks. 9. Understand reset-architecture and work with design & FW teams to develop reset groups and… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** Looking for a design engineer to work on challenging high speed design of ... from system spec, verifying the hardware implementation, software co-development and verification . The job is on site. Locations are flexible: San Jose… more
- Broadcom (Irvine, CA)
- …Logic design , chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification , DRC, logic synthesis + Knowledge of DFT methods ... and internal cross-functional teams in areas such as physical design , STA, DFT, and packaging? Have you taped out...ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in… more
- Cisco (San Jose, CA)
- …**Meet the Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you ... ASIC Hardware Development experience. + Prior experience on hardware design specifications and verification plan/matrix, RTL & testbench implementations. +… more
- Cadence Design Systems, Inc. (Irvine, CA)
- …experience required. * Min. 7 years in sales and account management or as a Applications Engineer or Design Engineer with proven track record of success * ... requirements in the custom/analog and digital implementation and/or functional/formal verification space, coordination of sales strategies and efforts across… more