- Silvus Technologies (Irvine, CA)
- …fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for ... aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus' Irvine CA engineering… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer - Signal Processing_** who will report to the _Director of FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Silvus Technologies (Irvine, CA)
- …a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design ...and methodologies including synthesis, place and route, STA, formal verification . - Proven track record of delivering metric driven… more
- NVIDIA (Santa Clara, CA)
- …analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification , logic synthesis, timing ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...teams at NVIDIA. + Work closely with software, architecture, design , verification , and silicon validation teams. +… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design ... using Cadence tools. + You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration...part in floor planning, custom layout and verifying against design rules and schematics. What we need to see:… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer ? If yes, We would love to hear from you! We are looking ... for a Senior Mask Layout Design Engineer , someone who is excited to...technologies using Cadence tools. + You'll work multi-functional with ASIC and mixed-signal engineers to customize designs for integration… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops… more
- Microsoft Corporation (Mountain View, CA)
- …engineers to help achieve that mission. We are looking for a **Senior Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... Throughout the program you will be interacting with various teams, including architecture, verification , and physical design , ensuring that the design is… more
- Silvus Technologies (Irvine, CA)
- …to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA/RTL Design Engineer_** who will report to the _Director of FPGA Engineering_ on the ... the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal… more