• Digital Design Engineer

    Meta (San Diego, CA)
    …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...and chip life until production maturity. 5. Work with FPGA /Emulation engineers to perform early prototyping. 6. Support hand-off… more
    Meta (10/30/25)
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  • Staff TPU Design Manager, Silicon

    Google (Mountain View, CA)
    Staff TPU Design Manager, Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA; San Diego, CA, USA **Advanced** Experience owning outcomes and decision ... San Diego, CA, USA** . **Minimum qualifications:** + Bachelor's degree in Electrical Engineering , Computer Engineering , Computer Science, or a related field, or… more
    Google (11/19/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …to help meet the power requirements 14. Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...and chip life until production maturity 5. Work with FPGA /Emulation engineers to perform early prototyping 6. Support hand-off… more
    Meta (10/18/25)
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  • SystemVerilog/UVM Design Verification…

    US Tech Solutions (Goleta, CA)
    …of all assigned verification tasks. **Experience:** + 5-8 years of experience in Pre-Silicon Design Verification ( FPGA or ASIC ). + Strong proficiency in ... within a UVM/SystemVerilog environment. + The engineer will collaborate with design , architecture, and validation teams to ensure thorough functional and coverage… more
    US Tech Solutions (10/14/25)
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  • AR/VR Silicon Architect

    Meta (Sunnyvale, CA)
    …analysis and estimate power consumption 5. Perform architectural studies including selecting ASIC technologies, FPGA ASIC emulation, and other system ... working with a small group of experts specialized in data compression to design end-to-end compression and streaming solutions for VR and AR. The position requires… more
    Meta (10/11/25)
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  • Software Engineer I

    Cadence Design Systems, Inc. (San Jose, CA)
    …to bridge and gate -keep the full integration, validation, and characterization of ASIC , HW/PCB, SW, FW, and FPGA subsystems in the whole development cycle. ... Cadence is the leader in hardware emulation-prototyping technology and products. System engineering team is responsible to define, validate and enable the products.… more
    Cadence Design Systems, Inc. (10/08/25)
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  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/verification space and have delivered great QoR on these ... Development Team to d evelop and enhance the Protium FPGA -Based Prototyping product which is used by leading CPU/GPU/HyperScaler...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
    Cadence Design Systems, Inc. (09/30/25)
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  • Senior Security Firmware Engineer

    SanDisk (Irvine, CA)
    …optimizing, and validating the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + Contribute to the Security Development Lifecycle of the ... SPDM, and IDE. + Develop firmware on SoC platforms, run simulation or bringing up FPGA and ASIC . + Familiarity with writing code in Github repository and it's… more
    SanDisk (09/18/25)
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  • Hardware Engineer II (Co-op) - United States

    Cisco (San Jose, CA)
    …high volume manufacturing. Creative Hardware Engineering positions are available in: + ASIC Design and Verification + System/Board Design + Circuit Board ... or a related field. + Proficient understanding of hardware engineering principles and experience with hardware design ...or embedded system design . + Knowledge of FPGA / ASIC design flow and basic… more
    Cisco (11/14/25)
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  • Director, Supply Base Management

    Palo Alto Networks (Santa Clara, CA)
    …Materials Management and Strategic Cost Analysts + Partner with Hardware/Software Engineering and Product Management on Technical Design requirements (PRD/PDD) ... This critical role works closely with cross-functional partners in Engineering , Technical Ops, Product Management, NPI, Risk & Compliance,...planning, or materials teams. + Deep experience in Custom ASIC and Custom PCBA design and sourcing,… more
    Palo Alto Networks (11/18/25)
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