- Microsoft Corporation (San Diego, CA)
- …+ 3 years of developing UVM-based testbenches or completion of formal design verification (DV) training. **Other Requirements:** Ability to meet Microsoft, ... Verify IP blocks for Microsoft's next-generation cloud servers using FPGA and ASIC technologies. + Collaborate with...and/or Perl for scripting and automation. + Experience with FPGA design , implementation, and debug tools. +… more
- The Boeing Company (El Segundo, CA)
- …+ Support unit-level integration and performance simulations. + Support ASIC and FPGA level system design and verification . + Support hardware ... and Launch Engineering team in **El Segundo, California** , to design and develop state-of-the-art, space-based communication systems for commercial, civil, and… more
- The Boeing Company (El Segundo, CA)
- …+ Support unit-level integration and performance simulations. + Support ASIC and FPGA level system design and verification . + Support hardware ... and Launch Engineering team in **El Segundo, California** , to design and develop state-of-the-art, space-based communication systems for commercial, civil, and… more
- Meta (San Diego, CA)
- …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
- Meta (Sunnyvale, CA)
- …to help meet the power requirements 14. Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...definition and RTL implementation 2. Contribute to chip-level integration, verification plan development and verification 3. Define… more
- Google (Sunnyvale, CA)
- …with Product teams to ensure that goals are met with systems and will work with ASIC / FPGA , Software, and Verification teams to ensure proper verification ... Staff Hardware Systems Design Engineer, Board and Systems _corporate_fare_ Google _place_...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
- The Boeing Company (El Segundo, CA)
- …Power Supply * Electronics Packaging * ASIC FPGA Development and Verification * Electrical Design System Engineer * RF Microwave Engineer * Electrical ... Power Systems & Battery/Solar Array Electrical Design * Antenna RF & Arrays * RF Digital Communications **Position Responsibilities:** + Analyzes customer and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops industry… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …memory subsystem verification and/or performance analysis . Knowledge of System Verilog and FPGA design . Knowledge of AXI, DFI and MIPI protocols . Working ... teams, definers and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts for internal… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …thesis in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
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