- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...within Subsystems + Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- Meta (Sunnyvale, CA)
- …the efficiency and innovation of our data center applications. **Required Skills:** ASIC Engineer Physical Design Responsibilities: 1. Develop and own physical ... Join Meta's Infrastructure organization to leverage your expertise in ASIC Physical Design, driving high-performance, AI/ML SoC and IP...design implementation of multi-hierarchy low-power and high-performance designs, including physical-aware… more
- Cisco (San Jose, CA)
- …Exposure toscripting languages (eg, Python, Perl, TCL) for automation. + Familiarity with ASIC /SoC design flow including synthesis , place & route, and timing ... opens. Applications are accepted until further notice. **Meet the Team** The ASIC Group works closely with other development teams within Cisco, including marketing,… more
- RTX Corporation (El Segundo, CA)
- …the verification of RTL blocks using VHDL or System Verilog + Proficiency using ASIC and/or FPGA simulation and synthesis tools (eg Modelsim, Synplify, Quartus, ... Computer engineering candidate to be involved in the design, implementation , verification, and integration of a wide variety of...Technology team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL,… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... including clock domain crossing checks and MTBF analysis, logic synthesis , netlist quality checks, etc. + Help in all...timing constraints generation and management, and ECO generation and implementation . What we need to see: + BS (or… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation ,...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in python or other… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation ,...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in python or other… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing… more
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