- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation ,...+ Experience in RTL design (Verilog), verification and logic synthesis . + Strong coding skills in python or other… more
- Meta (Sunnyvale, CA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in test plan development and debug 4. Collaboration with implementation team to close the design on timing and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Design Engineer Responsibilities: 1. Responsible for micro-architecture development. 2. ... using Verilog, System Verilog and/or HLS. 3. Responsible for Lint, CDC, Synthesis , & Power Optimization. 4. Collaborate with verification and emulation teams in… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... Team, you will play a critical role in shaping the architecture, design, implementation , and verification of DFT IPs for our next-generation SoC products. You'll… more
- Amazon (Sunnyvale, CA)
- …quality RTL -Ensure quality by running and tracking results of front-end tools including: Synthesis , Lint (RTL, DFT, UPF), Power Analysis and STA -Take the lead and ... / Communications Engineering -Exposure to Formal verification -Experience with physical implementation flows Amazon is an equal opportunity employer and does not… more
- Cadence Design Systems, Inc. (Irvine, CA)
- …knowledge and understanding of custom/analog and mixed signal flows, and/or Digital implementation flows ( synthesis , place & route and signoff) and/or experience ... of the core technology requirements in the custom/analog and digital implementation and/or functional/formal verification space, coordination of sales strategies and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design, and methodologies including synthesis , place and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... for physical design closure - Drive IO/Core block physical implementation through synthesis , floor planning, bus /...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- Broadcom (San Jose, CA)
- …in using synthesis tools (DC-T, Genus) + Strong understanding of ASIC design flows, including RTL and place-and-route. + Excellent problem-solving skills and ... **Job Description:** **Broadcom is looking for a senior STA engineer . In this role, you will be contributing to...validation and timing closure of mission critical IP and ASIC blocks in advanced technology nodes** Responsibilities Include: +… more