- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... for physical design closure - Drive IO/Core block physical implementation through synthesis , floor planning, bus /...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC ... and support role offers an opportunity to work on a variety of digital implementation and support activities associated with Cadence EDA tools for Synthesis ,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …outcomes for our customers. You will be a highly motivated, optimistic, and energetic engineer with a good appreciation of ASIC design methodologies from RTL to ... technology. This opportunity is for an engagement focused Product Engineer (PE) in the Digital and Signoff Group (DSG)...and learning. You will have proven hands-on experience with Synthesis and PPA optimization on more advanced nodes and… more
- Amazon (Sunnyvale, CA)
- …closure at the block and Sub System level. - Drive block physical implementation through synthesis , formal verification, floor planning, bus / pin planning, ... Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our...Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates for ... programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production. The… more
- Meta (San Diego, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
- Amazon (Cupertino, CA)
- …tool decisions. - Experience in high-performance, low-power physical design, and implementation techniques with industry standard synthesis , PnR, or Signoff ... our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud...years in developing design methodology or CAD flows in synthesis , PNR, or sign-off areas for advanced technology nodes.… more
- Meta (Sunnyvale, CA)
- …requirements needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities: 1. Physical design implementation from RTL to ... architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will perform physical...at Meta Reality Labs, you will perform physical design implementation of complex SoC and IP-subsystems. In this high… more
- Silvus Technologies (Irvine, CA)
- …career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking… more
- NVIDIA (Santa Clara, CA)
- …standard FPGA prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. What you'll be ... prototypes by making RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance of the prototype, analyze… more