- Amazon (Sunnyvale, CA)
- …quality RTL -Ensure quality by running and tracking results of front-end tools including: Synthesis , Lint (RTL, DFT, UPF), Power Analysis and STA -Take the lead and ... / Communications Engineering -Exposure to Formal verification -Experience with physical implementation flows Amazon is an equal opportunity employer and does not… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Responsibilities Include:** + Work on Design Implementation activities related to place and route and/ or timing closure - ... floor-planning, partitioning, placement, clock tree synthesis , route, timing analysis, timing closure, physical verification (LVS/DRC). + Drive tools and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design, and methodologies including synthesis , place and… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... for physical design closure - Drive IO/Core block physical implementation through synthesis , floor planning, bus /...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC ... and support role offers an opportunity to work on a variety of digital implementation and support activities associated with Cadence EDA tools for Synthesis ,… more
- Broadcom (San Jose, CA)
- …initial floor plan. 5). Develop Verilog RTL. design verification support, logic synthesis , physical implementation constraints, static timing analysis. 6). Work ... brought some of the most complex and cutting-edge networking ASIC 's and multichip solutions to market over the last...directly with the physical implementation team from initial floor planning to final timing… more
- Meta (Sunnyvale, CA)
- …prior to joining Meta 8. 2+ years of experience as a Digital Design Engineer 9. Experience in RTL coding, synthesis and/or SoC Integration 10. Experience ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work...for top-level or block level uArchitecture definition and RTL implementation 2. Contribute to chip-level integration, verification plan development… more
- NVIDIA (Santa Clara, CA)
- Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you interested in pushing the boundaries of innovation to make ... We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa...RTL FPGA-friendly, partitioning the design and taking it through synthesis and place and route. + Improve performance of… more
- Amazon (Cupertino, CA)
- …tool decisions. - Experience in high-performance, low-power physical design, and implementation techniques with industry standard synthesis , PnR, or Signoff ... our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud...years in developing design methodology or CAD flows in synthesis , PNR, or sign-off areas for advanced technology nodes.… more
- Silvus Technologies (Irvine, CA)
- …career._ THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking… more
Recent Jobs
-
Local City Driver
- Saia, Inc (Fairmont, WV)
-
Production Operator Lead
- Niagara Bottling LLC (Rialto, CA)