• Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
    NVIDIA (07/29/25)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... , Verilog and/or System-Verilog with a deep understanding of physical design and VLSI. + Experience with...from the crowd: + Experience with all stages of ASIC design flow including front end … more
    NVIDIA (05/30/25)
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  • ASIC Technical Program Management Lead

    Cisco (San Jose, CA)
    …of applications are received.** **Meet the Team** **Cisco Silicon One leads Cisco's ASIC design , creating next-generation network devices optimized for the AI/ML ... Engineering or other technical field.** + **Prior experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional… more
    Cisco (07/23/25)
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  • Senior Signal Integrity Engineer (Hardware/…

    Palo Alto Networks (Santa Clara, CA)
    …to validate critical interfaces. Within the Hardware team, you collaborate closely with Board Design , ASIC Design , PCB Layout, and Validation Test. You will ... Component Engineers. **Your Impact** + Collaborate with a cross-functional team including: ASIC , Board design , PCB layout, Operations supply base management,… more
    Palo Alto Networks (07/26/25)
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  • FPGA/ ASIC Verification Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this ... FPGA/ ASIC Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more
    SpaceX (06/21/25)
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  • ASIC Design Efficiency Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... design /architecture experience + Performance verification, low power or physical (synthesis/VLSI) design experience + Scripting knowledge in Python/Perl… more
    NVIDIA (06/15/25)
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  • ASIC Verification Engineer

    Cisco (San Jose, CA)
    ASIC in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of the ... ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose,...Wireless products. With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers… more
    Cisco (07/25/25)
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  • Principal Switch Engineering Architect

    NVIDIA (Santa Clara, CA)
    …lines, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design , verification, physical design and platform ... and eventually turn into a source of information for design and verification engineers in the team. + Define...experience + More than 15 years of experience in ASIC development + More than 7 years of experience… more
    NVIDIA (05/21/25)
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  • PCIe Expert - ASIC /Firmware Architect…

    SanDisk (Irvine, CA)
    …We are looking for a **PCIe expert** with a strong background in ** ASIC and Firmware development** to help define, architect, and deliver the next generation ... drive (SSD) products. In this high-impact role, you will drive the design of advanced SSD subsystems, write detailed specifications, and lead debug efforts… more
    SanDisk (06/16/25)
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  • Senior Engineer, System Architecture (Hardware/…

    Palo Alto Networks (Santa Clara, CA)
    …for next generation firewall products, identify performance bottlenecks and solutions, design and model protocol and sub-component offload solutions. In addition to ... high level design work, you will also do hands-on coding, including:...Development - Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC more
    Palo Alto Networks (08/08/25)
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