- Google (Mountain View, CA)
- …signal processing chains for mixed-signal sensing or actuation ASICs. + Experience with ASIC design methodologies for clock domain checks, reset checks, and low ... design . + Experience in collaborating with system and hardware architecture, mixed-signal design , verification, physical design , software to build and… more
- Broadcom (San Jose, CA)
- …guidelines **Knowledge and Experience required:** + A good understanding of IP & ASIC design methodologies + Extensive experience with EDA DRC/LVS support + ... ease of use is critical. **Responsibilities:** Develop and support design automation flows for ASIC products and... products and associated IPs. This role involves + Physical verification runset support and development + Providing guidance… more
- Google (Mountain View, CA)
- …with silicon development (eg, research, algorithm development, digital and physical design , implementation, verification, bring-up and post-silicon maintenance). ... + Experience in ASIC hardware architecture and silicon design . + Experience in coding with C or C++, and scripting languages, such as Perl or Python. +… more
- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for...Electrical Engineering with a minimum of eight years of CPU/GPU/ ASIC implementation + Proficiency in TCL scripting + Proficiency… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more
- Google (Sunnyvale, CA)
- …Computer Science, with an emphasis on computer architecture. + 10 years of experience in ASIC design with 3 years of experience working on security design . ... specifications. + Develop SystemVerilog RTL to implement logic for ASIC products according to established coding and quality guidelines....to verify and debug RTL designs. + Work with physical design teams to ensure design… more
- Meta (Sunnyvale, CA)
- …quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Drive IP/sub-system ... **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon...ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11.… more
- Meta (Sunnyvale, CA)
- …2. Deliver quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Develop system tests in C ... **Summary:** We are looking for an experienced digital design engineer to support our Reality Labs Silicon...ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11.… more
- Google (Goleta, CA)
- …the quantum electronics team, providing key technical contributions in the area of ASIC Design Verification (DV) as we realize sophisticated electronics for ... work as part of a team of digital, DV, Physical Design (PD), and RF/analog/mixed-signal engineers, collaborating...the entire verification lifecycle for our ASICs, collaborating with ASIC architects and digital designers to understand the chip… more
- NVIDIA (Santa Clara, CA)
- …impact on the world. Are you a computer engineer with a passion for automation of VLSI ASIC design ? Be part of a diverse team creating NVIDIA's chip design ... software including RTL synthesis, equivalence checking, and early physical design and methodology for all of...design , formal equivalence checking. + Experience in other ASIC methodologies such as RTL Lint, CDC, DFT or… more