- Meta (Sunnyvale, CA)
- …quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Drive IP/sub-system ... **Summary:** We are looking for a Digital Design Engineer to support our Reality Labs Silicon...ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11.… more
- Meta (Sunnyvale, CA)
- …2. Deliver quality RTL in collaboration with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4. Develop system tests in C ... **Summary:** We are looking for an experienced digital design engineer to support our Reality Labs Silicon...ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex IPs 11.… more
- Google (Goleta, CA)
- …the quantum electronics team, providing key technical contributions in the area of ASIC Design Verification (DV) as we realize sophisticated electronics for ... work as part of a team of digital, DV, Physical Design (PD), and RF/analog/mixed-signal engineers, collaborating...the entire verification lifecycle for our ASICs, collaborating with ASIC architects and digital designers to understand the chip… more
- NVIDIA (Santa Clara, CA)
- …impact on the world. Are you a computer engineer with a passion for automation of VLSI ASIC design ? Be part of a diverse team creating NVIDIA's chip design ... software including RTL synthesis, equivalence checking, and early physical design and methodology for all of...design , formal equivalence checking. + Experience in other ASIC methodologies such as RTL Lint, CDC, DFT or… more
- Cisco (San Jose, CA)
- …are received. **Meet the Team** Cisco Silicon One is the center of Cisco's ASIC design and is driving the development of next-generation network devices for ... design teams to define the next generation of ASIC products being developed. You will work multi-functionally with...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- Microsoft Corporation (Mountain View, CA)
- …effectively with: + Architects + Analog mixed-signal designers + Verification engineers + Physical design and DFT teams + Other front-end designers + Align ... achieve that mission. We are looking for a **Principal Design Engineer** to work in the dynamic Microsoft Artificial...trade-offs, post-silicon debug, and successful delivery of IP and ASIC /SoC designs. + 7+ years of experience in high-speed… more
- Cisco (San Jose, CA)
- …(>25Gb/s), and high accuracy, analog designs for optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with ... Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + Alternate… more
- Qualcomm (San Diego, CA)
- …Modem, Machine learning, IoT and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by ... frontend tools to check for linting, clock domain crossing, etc + Work with physical design team on design constrain and timing closure + Work with low… more
- Silvus Technologies (Irvine, CA)
- …career. THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...* Experience with wireless communication systems on FPGA or ASIC designs. The pay range is NOT a guarantee,… more
- Qualcomm (San Diego, CA)
- …art GPU cores and will be working closely with the graphics microarchitecture and physical design teams. The role will also include working with execution driven ... performance, power and area. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep… more