- Amazon (Sunnyvale, CA)
- …good communication and analytical skills. * Should be able to work closely with IP Design teams and Backend Physical Design teams across multiple sites. ... of Echo devices is looking for a Senior SoC Design -STA Engineer to continue to innovate on behalf of...STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip… more
- Meta (Menlo Park, CA)
- …C/C++ for developing automation software or tooling 14. Working knowledge of physical infrastructure design including structured cabling and fiber-optic cabling ... at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network....Understanding of different Optics and internals of a switch ASIC 20. Familiarity with the Linux based systems **Public… more
- Silvus Technologies (Los Angeles, CA)
- …a fulfilling career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
- Microsoft Corporation (Mountain View, CA)
- …subsystems. + Collaborate with cross-functional teams, including architecture, verification, and physical design , to ensure designs meet specifications and ... engineers to help achieve that mission. We are looking for a **Senior** ** Design Engineer** to work in the dynamic Microsoft Artificial Intelligence System on Chip… more
- Microsoft Corporation (Mountain View, CA)
- …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer** to join the team. **Responsibilities** + Establish yourself as ... an integral member of a design verification team for the development of AI components... verification with a delivering complex Application Specific Integrated Circuits( ASIC ) or System on Chip(SOC). **Other requirements:** Ability to… more
- NVIDIA (Santa Clara, CA)
- …intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer role? We are looking for a Senior Mask Layout Design Engineer! ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- Google (Sunnyvale, CA)
- This is a specialized role which requires physical interaction with hardware equipment in a simulated data center environment, utilizing Google labs, power, and ... 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced...goals are met with systems and will work with ASIC /FPGA, Software, and Verification teams to ensure proper verification… more
- NVIDIA (Santa Clara, CA)
- …We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and dynamic group of diverse ... high-speed mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog… more
- Siemens (Fremont, CA)
- …our RTL Synthesis product development, focus on delivering cutting-edge solutions for digital ASIC design . The ideal candidate brings 10+ years of deep expertise ... design and technical direction for RTL synthesis tools within the digital ASIC design flow. Define and evolve the architecture of RTL synthesis engines… more
- Broadcom (Irvine, CA)
- …guarantee production quality for "first spin" silicon, we in the CSG ASIC team combine production workload-focused test harnesses with large scale emulation ... resources to provide extensive system level ASIC test coverage prior to first silicon fab. Our...Protocol + Interrupts (INTA, MSIx) + DMA Concepts + Physical and Virtual Memory Management + Complex Data Structures… more