- Meta (Austin, TX)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... 12. Knowledge of SOC Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design using SystemVerilog or other… more
- Meta (Austin, TX)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....DFT Modes 3. Perform STA for full chip and Physical partition blocks using PrimeTime 4. Run Logic/ Physical… more
- Amazon (Austin, TX)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's...IC Compiler, Fusion Compiler, Cadence synthesis APR tool - Physical aspect of VLSI designs - Strong written and… more
- Amazon (Austin, TX)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...while also being deeply important to our customers. We design and build every component of our hardware and… more
- Amazon (Austin, TX)
- …architectures * Work with block designers to integrate DFT implementations * Work with physical design team to setup and implement DFT insertion flow * Develop ... breadth of knowledge in chip design concepts from micro-architecture through physical design Experience in programming and scripting with Perl, Python or… more
- Qualcomm (Austin, TX)
- …future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. ... be part of a team responsible for the complete Physical Design Flow and deliveries of complex,...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- Global Foundries (Austin, TX)
- …ecosystem partnership, or ASIC program management. + Strong understanding of ASIC design flows (front-end & back-end) and development lifecycle for ... growth across the entire supply chain to support GF technology adoption. Experience in ASIC flow from design to high volume manufacturing and working with key… more
- Qualcomm (Austin, TX)
- …define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... Signal Integrity, Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus) + Expert in… more
- SpaceX (Bastrop, TX)
- …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In this ... Sr. Design Verification Engineer (Silicon Engineering) Bastrop, TX Apply...of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level… more
- IBM (Austin, TX)
- …toolsets. You will collaborate closely with RTL designers, verification engineers, and physical design teams to ensure high test coverage and manufacturability. ... years of hands-on experience in DFT implementation for complex ASIC /SoC designs in advanced process nodes (eg, 7nm, 5nm,...scan compression, and hierarchical DFT * Experience with DFT-aware physical design flows, including timing closure and… more