- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1....DFT Modes 3. Perform STA for full chip and Physical partition blocks using PrimeTime 4. Run Logic/ Physical… more
- Palo Alto Networks (Santa Clara, CA)
- …for next generation firewall products, identify performance bottlenecks and solutions, design and model protocol and sub-component offload solutions. In addition to ... high level design work, you will also do hands-on coding, including:...Development - Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC … more
- Cisco (San Jose, CA)
- Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose, California, US + Area of ... are received. Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets...systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA… more
- Broadcom (San Jose, CA)
- …and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. + Participate in large complex design ... Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in...latest technology nodes, lead one or more disciplines in design closure as part of the design … more
- NVIDIA (Santa Clara, CA)
- …performance designs + Expertise in SystemVerilog or similar HDL + Solid understanding of physical design and VLSI + Good communication skills + Background in ... We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking...Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our next-generation mobile,… more
- Amazon (Cupertino, CA)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but...while also being deeply important to our customers. We design and build every component of our hardware and… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis ... generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- Amazon (Sunnyvale, CA)
- …party IP blocks -Estimate power, performance, and area for significant IPs early in design cycle -Execute on design specifications to deliver high quality RTL ... that have gone to volume production -Hands on experience in low power design techniques -Strong written and verbal skills Preferred Qualifications -Master's or Ph.D… more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out from the crowd: + Familiarity… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 8 years of experience in DFT or physical design . + Experience with scan insertion, Automatic Test Pattern Generation ... JTAG (IJTAG) tools and flow. + Experience with DFT Electronic Design Automation (EDA) Tools like Tessent/Genus/FC/Simvision, etc. **Preferred qualifications:** +… more