- Broadcom (Irvine, CA)
- …engineer capable of leading external and internal cross-functional teams in areas such as physical design , STA, DFT, and packaging? Have you taped out so many ... ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in...to prepare and execute risk mitigation actions + Execute physical design flows to check that incoming… more
- Cisco (San Jose, CA)
- …**Meet the Team** You will be part of the Silicon One development organization as an ASIC implementation engineer in San Jose, CA. As a member of this team you ... support. **Key Responsibilities:** + Responsible for development of the comprehensive Design -for-Test (DFT) & DFx solutions and architectures that support ATE… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , 3D...leading edge 3D technology platform for custom, high performance ASIC 's and SoC's, from design through manufacturing, ... architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer in 3D...to overcome the slowing of Moore's Law while delivering ASIC 's and SoC's. You will help develop new 3D… more
- Broadcom (San Jose, CA)
- …technologies in the industry encompassing 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next ... This is an exciting opportunity to develop new ideas, design the next generation of leading edge ASIC...the most advanced technologies in the industry. **Responsibilities:** + Design implementation and physical layout implementation of… more
- Broadcom (San Jose, CA)
- …from concept to product release, becoming a key contributor to all aspects of physical ASIC design . **Job Duties and Responsibilities may include:** + ... major segment of the semiconductor industry-including AI-to build advanced ASIC solutions. Join the Design Implementation team...AI-to build advanced ASIC solutions. Join the Design Implementation team within Broadcom's ASIC Products… more
- Broadcom (San Jose, CA)
- …guidelines **Knowledge and Experience required:** + A good understanding of IP & ASIC design methodologies + Extensive experience with EDA DRC/LVS support + ... already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** Design Automation Engineer ** This position is part of a team tasked… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , Google Cloud...route for SoC or with multiple-cycles of SoC in ASIC design . **About the job** In this role, ... focus on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL, design for… more
- Google (Sunnyvale, CA)
- SoC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... complex SoC. + Experience with multiple-cycles of SoC in ASIC design . + Experience with scripting languages...AI/ML-driven systems. As a System on a Chip (SoC) Physical Design Engineer , you will… more
- Amazon (Cupertino, CA)
- …of machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our ... implementation and sign-of. tools in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design flows, and methodologies… more
- Arrow Electronics (Santa Clara, CA)
- … ASIC Design and Development: + Design , implement, and verify ASIC components with a focus on PCIe physical layer requirements. + Utilize Verilog and ... **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role:...experience in PCIe system architecture, with an emphasis on physical layer design and specification. + Ensure… more